Search Results for "home automation in c++"

Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this gives...

1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity database...

This OS is a configured version of Raspbian (debian OS) that focuses on 3D printing, CNC controllers, and CAD/CAM applications. It includes many tweaks to get the GPU acceleration on webGL, VLC and Flash video for example. Since rc2, we now use F2FS for /home to improve sdcard performance. It was load tested on the pi2, pi3, and Pi3B+. It is based on a stripped down MATE desktop, and is intended to be shared along with the documented hardware projects. Please use the GPG key posted on the home...

Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.

openCarac aims to automatize the characterization of electronic circuits using your favourite Spice simulator and provide output files in HTML, LaTeX (c) and GNU Octave (c) scripts. openCarac is natively compatible with various simulators including: - Ngspice (c), http://ngspice.sourceforge.net - Gnucap (c), http://gnucap.org/dokuwiki/doku.php?id=gnucap:start - Xyce (c), http://xyce.sandia.gov It comes with an API which permits to add other features and extend openCarac compatibility...

Tcl binding to levmar library implementing Levenberg-Marquardt optimization algorithm often used in data fitting. Levmartcl is a standard Tcl extension providing command interface to levmar functionality. This library is only a wrapper of <levmar> which actually performs the work. See the <levmar> home site for details: http://www.ics.forth.gr/~lourakis/levmar/

QConsole is a custom Qt widget implementing a standard console to be inherited to support a specific scripting language or shell, and then embedded in any Qt application. As example, a Tcl console (QtclConsole) is provided for use in EDA applications

esweep is a scriptable audio measurement program which features various signals and signal processing functions. Its main purpose is the measurement of speakers.

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered

Efficient Symbolic Tools package (EST) is a BDD based tool for the formal verification of concurrent systems. Its advantages are flexibility, portability and an efficient memory management. It runs under different OS, including Linux and Windows 2000/XP.

decida is [de]vice & [ci]rcuit [d]ata [a]nalysis. It is used for electron device characterization, procedural simulation/analysis of electronic circuits, or more general data analysis tasks.

TkGate is a event driven digital circuit simulator with a tcl/tk-based graphical editor. TkGate supports a wide range of primitive circuit elements as well as user-defined modules for hierarchical design.

MMTL, the Multilayer Multiconductor Transmission Line 2-D and 2.5-D electromagnetic modeling tool suite, generates transmission parameters and SPICE models from descriptions of electronics interconnect dimensions and materials properties.

PEP is a modelling and verification framework for parallel systems, providing a large number of different modelling languages and verification techniques (e.g. SDL, Petri nets and model checking)

Scripting Tcl interface to Qt multiplatform library

IC CAD tools, documentation, scripts, and libraries for designing high-performance ICs, including SUE for schematics, MAX for layouts, DPC for datapaths and MCC for megacells. Prebuilt binaries for Linux, Sparc-Solaris, and HP-PA.

Spgmr08 is a Linux software package for programming devices in the Motorola MC68HC908 microcontroller family.

Icarus Verilog Interactive on MacOSX

a set of free tools and software aimed at design automation. SPICE ( NG-spice )MAGIC XCIRCUIT Main aim - to automate the layout of clock distribution on a chip, using rotary clock oscilation.

Source Navigator for Verilog is a verilog parser that allows Source Navigator to be used with the Verilog Hardware Description Language. http://sources.redhat.com/sourcenav

Elenix is a GNU/Linux distribution dedicated to the needs of management, development, and troubleshooting of electronic circuits.