Schematic circuit editor for VLSI and Mixed mode circuit simulation.
This is a maths solving app and study guide for various levels..
Verilog Finite State Machine (FSM) Code Generator
Open source observatory control software
Drip Irrigation design and modeling in Tunisia
Data Plotting and Analysis for Science and Engineering
THIS PROJECT MIGRATED TO https://gitlab.com/mwetoolkit/mwetoolkit3/
Redhat Linux OVM System Performance Monitoring
Create fast bare-metal FPGA designs without Verilog or VHDL
Real-time data acquisition and visualization software
Tool for Wide Area Measurement System