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Given a circuit described in terms of common CMOS logicgates, this is capable of minimizing logic area by repetitive examination of sets of three gates, utilizing a pre-computed lookup table of pre-optimized replacements. Reductions include XOR gates and can be extended to 3-input logicgates.
CEDAR LS is an interactive digital logic simulator to be used for teaching of logic design or testing simple digital designs. It features both low-level logicgates as well as high-level components, including registers and a Z80 microprocessor emulat
LSim is a software for simulation and make executables to ARM Cortex-M3 mcu from logicgates diagram. LSim can compile logicgates diagram and generate binary executable files (*.bin, *.hex) for cortex-m3 mcu´s (LPC1768, under development).
libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logicgates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
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