Open Source VHDL/Verilog Multimedia Software

VHDL/Verilog Multimedia Software

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Browse free open source VHDL/Verilog Multimedia Software and projects below. Use the toggles on the left to filter open source VHDL/Verilog Multimedia Software by OS, license, language, programming language, and project status.

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  • 1
    Development of a fully designed alarm clock implemented on the Xilinx Spartan3 board.
    Downloads: 0 This Week
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  • 2
    This is the award-winning FALCON I object recognition system! Capable of tracking up to 12 different objects simultaneously, and with over 6 times the raw resolution of the CMUCam, this is one of the most powerful vision systems in its class.
    Downloads: 0 This Week
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  • 3
    The aim of this project is to develop a Graphic Processing Unit core targeting FPGA implementation.
    Downloads: 0 This Week
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  • 4
    FUI Audio DAC

    FUI Audio DAC

    FPGA-Based USB-Input Audio Digital to Analogue Converter

    An open-hardware and -firmware project that implements a USB-input fully-digital class-D audio amplifier. All processing is done on FPGA, including the USB-physical, USB-SIE, HID interface, clock-recovery, bus voltage regulation, noise-shaping and PWM output. A Microchip PIC based remote control is also included. The remote maps to the media buttons of the USB HID interface. The volume control, next track, previous track, stop and play/pause functions are supported.
    Downloads: 0 This Week
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  • 5
    Genode FX is a composition of hardware and software components that enable the creation of fully fledged graphical user interfaces as system-on-chip solutions using commodity FPGAs such as Xilinx' Spartan3 and Virtex FPGAs.
    Downloads: 0 This Week
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  • 6
    Este proyecto presenta GraphUIS, una implementación de un periférico de video en un FPGA como un diseño modular caracterizado por no tener memoria dedicada. Se desarrolló como un proyecto académico en la Universidad Industrial de Santander.
    Downloads: 0 This Week
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  • 7
    The H.264 VHDL core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video stream as input and outputs the encoded bitstream. Simple, fully synchronous design with low gate count.
    Downloads: 0 This Week
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  • 8
    This is an image coder with fixed sampling, at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with res. up to 352x288).
    Downloads: 0 This Week
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  • 9

    Labcoat: Cleanroom Apps for SuperWikia

    Labcoat; the VHDL graphic emulator.

    Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
    Downloads: 0 This Week
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  • 10
    This card will capture High Definition Video 1280x720 at 30fps, and soon be capable of 60fps and maybe even 1080p. This is a hardware project so source code, RTL, and board CAD files will be involved. All IC's and parts should be easily available.
    Downloads: 0 This Week
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  • 11

    OpenShader

    Open architecture GPU simulator and implementation

    Documentation, simulator, compiler, and Verilog implementation of a completely open-architecture graphics processing unit. This design is intended for academic and commercial purposes. The first step is to develop a detailed GPU simulator and compiler. The second step is to implement the GPU in synthesizable Verilog. The third step is to develop a feedback loop between the simulator and implementation, allowing power, performance, and reliability aspects of the hardware to feed back into ever more detailed and accurate simulations of a complete GPU. LICENSING Primary licensing is GPLv3. Secondary is Commercial. Commercial licensing (use incompatible with GPLv3) will be available via an elected or appointed non-profit Facilitator. Revenue will be invested per the discretion of the Facilitator and an advisory board. By contributing to this project, you agree to these terms. [See our Wiki for more information](https://sourceforge.net/p/openshader/wiki/)
    Downloads: 0 This Week
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  • 12
    A Verilog design for a simple ASIC that executes the Ray Tracing Algorithm.
    Downloads: 0 This Week
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  • 13
    A VHDL - Verilog SAD256 module
    Downloads: 0 This Week
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  • 14
    VIC of commodore 64 over FPGA
    Devellopement d'un controlleur d'affichage (VIC) du commodore 64 embarqué dans un FPGA avec controlleur d'animation integré.
    Downloads: 0 This Week
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  • 15
    vorbis-hw is an open-source hardware implementation of an Ogg-Vorbis decoder. My current plan is to port the "tremor" codec to VHDL.
    Downloads: 0 This Week
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  • 16
    An FPGA based system, using captured video as source of a basketball movement. Human movement is detected and translated into motion vectors to hit a virtual ball.
    Downloads: 0 This Week
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  • 17
    This is a fork of the Elphel cameras firmware CVS, fully open to contributions from the elphel users and developers community Everyone can submit patches or obtain CVS access for this fork Stable changes will be ported to the main CVS upon approv
    Downloads: 0 This Week
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  • 18
    A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.
    Downloads: 0 This Week
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  • 19
    Synthesia is an open hardware/software platform intended for creating standalone audio devices such as synthesizers on embedded processors.
    Downloads: 0 This Week
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