Macros for Desktop Operating Systems

Browse free open source Macros and projects for Desktop Operating Systems below. Use the toggles on the left to filter open source Macros by OS, license, language, programming language, and project status.

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  • 1
    AirDrive
    AirDrive is a file storage utility that uses the storage capacity of linked IMAP enabled email accounts for file storage with an FTP-like interface.
    Downloads: 1 This Week
    Last Update:
    See Project
  • 2
    This project provides a tool-chain for compiling C code for the SPEAR2 processor. It comprises a C compiler (GCC), an assembler/linker, a macro assembler, a basic library and a simulator.
    Downloads: 1 This Week
    Last Update:
    See Project
  • 3
    AutoSpreadsheet is a programmable macro tool for .xls format spreadsheets. It is ideal for situations when you have to perform a repetitive series of operations on a spreadsheet with a known layout but with arbitrary data.
    Downloads: 0 This Week
    Last Update:
    See Project
  • 4
    An implementation of the venerable MACRO assembler preprocessor from back in the mid 60's. It's interesting as a study of what was possible then, and how that could be useful today.
    Downloads: 0 This Week
    Last Update:
    See Project
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  • 5

    UniSIMD-assembler

    SIMD macro assembler unified for ARM, MIPS, PPC and x86

    UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel SSE/SSE2/SSE4 and AVX/AVX2/AVX-512 (32/64-bit x86 ISAs), ARMv7 NEON/NEONv2, ARMv8 AArch32 and AArch64 NEON, SVE (32/64-bit ARM ISAs), MIPS 32/64-bit r5/r6 MSA and POWER 32/64-bit VMX/VSX (little/big-endian ISAs) are mostly implemented (/w horizontal reductions) although scalar improvements, wider SIMD vectors with zeroing/merging predicates in 3/4-operand instructions are planned as extensions to current 2/3-operand SPMD-driven vertical SIMD ISA. See README file.
    Downloads: 0 This Week
    Last Update:
    See Project
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