Search Results for "eda" - Page 4
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Showing 545 open source projects for "eda"
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simutron
AVR simulator IDE
Electronic circuit simulator. Simple environment to run and debug firmware for AVR 8-bit microprocessors. Able to run arduino firmware. Internally this program uses the open source Simavr AVR Processor Simulator (https://github.com/buserror/simavr) and wraps all its functions in a GUI shell. Setups for firmware debugging scenarios can be created dynamically. Able to run 16MHz MCU with decent set of external parts in real time. In particular this can be used for development of CNC firmware... -
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KTechlab is an IDE for microcontrollers and electronics.
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FidoCadJ
Simple and intuitive 2D vector drawing for electronics and not only.
A multiplatform vector drawing program with a complete library of electronic symbols. Schematics and drawings are stored in a very compact text format. There is no netlist concept behind the drawings (so no simulation, and this is a choice) but this allows a great graphical flexibility and ease of use, making FidoCadJ the perfect tool for exchange sketches in forum and newsgroup discussions with a few clicks. Drawings can be exported in several graphic formats, such as pdf. Follow the... -
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SkyWater PDK
Open source process design kit for usage with SkyWater Technology
...Because the PDK is open, it becomes a common target for community reference designs, open tapeouts, and teaching curricula. Documentation and example flows show how to assemble complete toolchains, from RTL to sign-off, using open EDA components. The project effectively lowers the barrier to custom silicon, catalyzing an ecosystem around an accessible 130-nm process. -
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yad2xx
Yet Another JNI-D2XX Interface Project
A Java Native Interface (JNI) library suitable for communicating with a range of USB interface chips from FTDI via the D2XX driver. It currently supports OS X 10.10+ and Windows 7/8 x64. On OS X, the 64 bit JVM is supported. On Windows, support is limited to the 64 bit JVM (Java 1.8 is now 64 bit). Version 1.0 --------------------------------- - Java 8 - SPI support and sample (via MPSSE) -
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VlibTools
Tools and libraries for use with systemc and verilog
Tool suite and libraries for developing system-c models. Tools for managing RTL projects. -
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vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.
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kicad StepUp
kicad StepUp allows exporting kicad 3D board and comps in STEP AP214
kicad StepUp: a new approach to export kicad board and modules in STEP AP214 (with colors). With kicad StepUp, it is possible to work in kicad EDA with the same component model data available in the STEP AP214 3D format, and obtain a 3D STEP AP214 model of the pcb board and a complete board assembles with electronic modules, to be used for MCAD interchange. The accurate 3D visualization of components on board assembles in kicad 3dviewer, is maintained in the same accuracy and aspect in STEP AP214 format. ... -
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megatest
Run tasks/tests, get trustworthy pass/fail info rolled up
Distributed test running system. build for running simulations, quality assurance or similar where you need to run a large number of tests. Supports dependencies, iteration, disk space management and log file analysis. -
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SmGen
Verilog Finite State Machine (FSM) Code Generator
SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing -
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A program that generates PLD (Programmable Logic Device) programming tables & LFSR/BIBLO (Linear Feedback Shift Register/Built In Logic Block Observer) signature for a function given by the user.
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RxCalc
RxCalc is a calculator for the analysis of multi-stage receiver.
RxCalc is a calculator for the analysis of multi-stage receiver. The software can calculate cascaded and system parameters: gain, noise, sensitivity, input and output P1dB and IP3, noise floor, spur-free dynamic range, MDS, SNR, and others. Sources code: https://github.com/arhiv6/rxcalc Binary package: http://sourceforge.net/projects/rxcalc/ -
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JSDAI is a toolkit for STEP (ISO 10303), the STandard for the Exchange of Product Model data, that enables linking of CAD, CAM, PDM, PLM, CAx systems. JSDAI supports the development of Express data models (ISO 10303-11) and their implementation in Java.
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Gerbv is an open source Gerber file (RS-274X only) viewer. Gerbv lets you load several files on top of each other, do measurements on the displayed image, etc. Besides viewing Gerbers, you may also view Excellon drill files as well as pick-place file
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Mod Direct Panoramic Spectrum Analyzer
Mod Direct Panoramic Spectrum Analyzer
1. Added the ability to directly work with the chip (parameter "settings.ini" - Direct=1). 2. The possibility of cyclic writing/recording from realtime to a file and subsequent playback from it is added (double click of the left mouse button anywhere in the top spectrogram). The size of the MB file is specified in the settings file (Cyclic file size=100). -
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SVEditor is an Eclipse-based IDE (Integrated Development Environment) for SystemVerilog and Verilog files. It features syntax coloring, content assist, source indent and auto-indent, and structure display.
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dvkit
Eclipse-based IDE for design verification tasks
DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code -
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KiCAD5 Live USB
A Cross Platform and Open Source Electronics Design Automation Suite
A Cross Platform and Open Source Electronics Design Automation Suite Live USB. -
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Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
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Penthode
Penthode simulates, draw and plot electrical power distributions
Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design -
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Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
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My Beaglebone Black Project
show and configure
The Beaglebone Black project presented here is a software written by Python and Qt and is intended to show the simple control of inputs and outputs (GPIO), the graphic course of input signals GPIO, the configuration and sending and receiving of data via the UART interfaces, the display of the PIN configuration of the Beaglebone Black and the graphic display of the signal course at the analog inputs. The software runs on the BBB under Debian 8.9 and on Linux computers (as a demo). It is... -
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xc3sprog is a suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under linux. Originally based on code written by Andrew Rogers (http://www.rogerstech.co.uk/ ).
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qucs2EQ
Convert Qucs Prv1 data to Audacity EQ curve xml
Convert from Qucs Pr1.v dataset to Audacity equalization curve xml. Tested with Qucs Dataset 0.0.18 and Audacity 2.0.3
