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A Minecraft Launcher which is multi-functional, cross-platform
...HMCL has amazing cross-platform capabilities. It can not only run on different operating systems such as Windows, Linux, and macOS, but also supports multiple CPU architectures such as x86, ARM, MIPS, and LoongArch. You can easily play Minecraft on different platforms through HMCL.
EduMIPS64 (aka edumips) is a cross-platform MIPS 64 ISA simulator. It can be used to run and debug MIPS programs that are written using the MIPS64 instruction set. It supports visual debugging and lets you see what instructions do in the pipeline.
A MIPS processor modeled in Java for educational purposes and aimed at undergraduate Computer Architecture courses. It presently runs MIPS 32-bit R3000 ELF executables on any platform where Java itself will run. Five successively more sophisticated models of a pipelined MIPS RISC processor are included. Though the code is deliberately kept clear and simple in order that readers are able to figure out how a real processor works through the medium of the code, it will soon be able to run a real Linux O/S kernel compiled for MIPS in Java - at what speed we don't know!
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openDLX is a DLX/MIPS ISA compatible pipeline simulator.
(Visit https://github.com/smetzlaff/openDLX for the latest development version or if You want to contribute.)
Applications for mobile phones with Java installed (KVM MIPS 2), which functions as a calculator to solve basic problems offered to scientists of computing.
Fully graphical mips simulator, with a simple text editor. The aim is to not only have the entire mips isa implemented and simulated, but to have a mips ide. The text highlighting for the mips instructions set is currently underway. Version 3 Available.
A Java-written MIPS simulator developed to stimulate people learning the Assembly language. It adds graphics, sounds and user interation to make writing assembly programs more interesting.
A basic MIPS simulator based on DEVS (Discrete Event System Specification). This project aims to develop the behavior of some components of the MIPS architecture (Registers, Memory, Muxs) including only seven instructions (add, sub, and, or, lw, sw, beq)