Search Results for "threads g-code generator"

...Supported cartridge types so far, LoRom, HiRom, ExHiRom, DSP, SuperFX, SuperFX2, SDD1, CX4, SPC7110, SA1 (last two chips need Adafruit Clock Generator). Reads and writes SNES Satellaview 8M Memory packs (BS-X cartridge and Adafruit Clock Generator needed). Reads and writes Nintendo Power Super Famicom Memory Flash Cartridges (needs Adafruit Clock Generator for best result).

QuickMAN is a Mandelbrot fractal generator with multicore support. ASM-optimized code can reach over 100 billion iterations per second. Features an easy-to-use GUI, realtime pan/zoom, multiple palettes, image logging, and saving in PNG format.

CB2XML (CopyBook to XML) is a COBOL CopyBook to XML converter written in Java and based on the SableCC parser generator. This project includes utilities to convert an XML instance file into its COBOL copybook equivalent string buffer and vice versa. Source is now available in GitHub: https://github.com/bmTas/cb2xml

...The project offers two implementations: Implementation 1 is Algol68G: a recent checkout hybrid compiler/interpreter by Marcel van der Veer, supporting arbitrary arithmetic, partial parametrisation, complex numbers, POSIX threads, GNU plotutils, GNU scientific library, curses, sound, TCP sockets, RegEx and PostgreSQL. Inplementation 2 is algol68toc, a port by Sian Mountbatten of the vintage Algol68RS (UK Defense Research Agency) compiler. The implementation emits C code.

SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

Server Benchmark [s.b] allows server engineers and administrators to quickly complete the "burn in" phase of your server and VDI provisioning process. The software also allows users to benchmark processing and memory utilization by dynamically adding threads and building arrays to test memory capacity. Server Benchmark is also a great way to maximize capacity and test response from within your existing Citrix XenApp farm, and VDI infrastructure. Source code is attached to the "Source" folder.

CRC Generator is a command-line application that generates Verilog or VHDL code for CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The code is written in C for Win32, bus easily portable for other platforms