Search Results for "all-in-one" - Page 3
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Showing 88 open source projects for "all-in-one"
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This is a helpful and optimized tool support for Electronic Design Automation Engineer viewing vcd file format.Runing all 32-bit MS Window(95/98/Nt/2000/XP),Linux,Apple Mac OS classic.It is mean to be an open source viewer developed by SELAB-University o
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XSpiceHDL, an XSpice-VerilogHDL co-simulator incorporates a Schematic Capture GUI, modified run-time DLL capable XSpice3f5 based engine with Berkley Sockets IPC via CodeModel & PLI 1.0/2.0(VPI) DLLs, all in C++, wxWidgets & MSVC++ 6.0.
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QUASI is stand-alone AVR RISC processor simulator with debugging features, EDA-like GUI and plugin interface.
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ANVIL - (A)(N)other (V)erilog (I)nteraction (L)evel. C++ and VPI/C code to easily instrument RTL/Verilog (dut) and C++ testbench (tb) for more powerful and efficient verification (i.e., C++/tb drives simulator).
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PhiCAD is a LGPL'd , cross-platform software intended to provide to community an eclectic suite of CAD such as EDA to solve physics problems.
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Sk2Py is an wxPython-based IDE which assists in the migration of Cadence Skill(tm)-based PCells to Python PyCells for use in all Open Access environments. Please post any support requests or bug reports to the tracking system.
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Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. NO tool is providing a global framework to develop algorithms. Silicis is a new formal framework for designing [verification] algorithms.
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This software generate a complete project for ARM LPC 2119,2129,2292,2294,2194. It generate the main file, Makefile, and a initialisation file with a graphical interface. It's very useful because it calculate all value for the peripherals.
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Save hundreds of developer hours with components built for SaaS applications.Whether you want full self-service analytics or simpler multi-tenant security, Qrvey’s embeddable components and scalable data management remove the guess work.
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GerbTool is a set of tools for modifying gerber and excellon drill files. GerbTool can be used to tile multiple gerber files as a single job, and can be run interactively or in batch mode.
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Digital circuit simulator with an own IC-scripting-language, programmed in Visual C++ 2003.net, currently only available for Windows. Major technical goals: Creation of a bugfree interface and effective signal simulation. All config-files in txt-format.
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IVI is a graphical, interactive user-interface to various Open-Source HDL simulators. IVI is transitioning to using the Eclipse application framework.
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This project is aimed to develop an Hardware Monitor & Protection System for PCs using PICmicros. This project is divided into two branches: the first one involves microcontroller's firmware, the second one software used to manage the PIC via COM po
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Extensions to the circuit simulator Ngspice. One extension is the integration of the next generation build system SCons.
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Evide is short for "Emacs Verilog IDE". Evide is a cross-platform, intelligent, powerful and easy to use verilog developing evironment.
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mCon aims to be platform independent, complete IDE for micro controller development. The project will use Eclipse as its foundation and the initial goal is to support development for the microchip PIC microcontrollers.
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Grid-tools is a collection of scripts to aid in the submission of complex jobs to either Sun Grid Engine or LSF.
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Call for the specifications of (next generation of spice) spice4. The concept of spice kernel is proposed. The main function of spice kernel is to provide a communication between "application layer" and "low-level Algorithm layer".
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GNU PIC LIBRARY PROJECT The interest of this project is to develop a set of Libraries that are released in LGPL License to use to PIC microcontroler programming. Then any program resulted by this use would be a proprietary or free softwares.
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"DSO" is a Digital Signal Oscilloscope. My DSO will be connected via the USB to the PC. All software to operate the DSO is developed within this project.
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Virtual electronic circuit simulation with JAVA based schematic entry and wave viewer, based on (Berkeley) SPICE, for any OS/Server/Browser configuration. Due to missing public feedback for over one year its status is set to INACTIVE (1/2004) - sorry.
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Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.
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MOPPI (Multiple OPerations Per Instruction) is a simple machine simulator written in C++. It will include assembler, loader, and simulator components that allow a user to experience the entire process of developing a simple microprocessor based simulator
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A clearing house for various pieces of open source software which use the GenCAM data format for input or output of electronic interconnect (PWB, PCB, PWA, PCA) information.