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  • 1
    This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
    Downloads: 0 This Week
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  • 2
    CAPLET

    CAPLET

    GDS visualization and parallelized capacitance extraction

    Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.
    Downloads: 0 This Week
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  • 3
    RS485 C#/Python library

    RS485 C#/Python library

    RS485 library for C# and Python

    This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux.
    Downloads: 0 This Week
    Last Update:
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  • 4
    Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
    Downloads: 0 This Week
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  • 5
    The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.
    Downloads: 0 This Week
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