Search Results for "c++ to python converter"

1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity...

pyGerber2Gcode is a Pyhon based simple Gerber to G-code converter.

This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).

Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.

This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux.

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.

This project has moved to http://sourceforge.net/projects/ngspice-ext.

A Step Closer to a Fully Gui ATLAS .log Converter A Gui .in Editor to be Used by ATLAS .log awk converter

naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information

Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.

A program that analyzes info about an automotive engine, and wanted power increase in horsepower and the program helps give the user a possible turbocharger that satisfies the requirements.

Modular, Configurable Simulator for Computer Architects

Extensions to the circuit simulator Ngspice. One extension is the integration of the next generation build system SCons.

The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.

This is a Computer Aided Electronic Design tool. It features schematic capture, simulation and PCB layout for both analog and numerical componants with the help of Gnome.

Blitzer is a simple tool for driving the SX-Blitz microcontroller programmer from Parallax. There is now a version for PalmOS devices.

JSalesman is a very efficient Travelling Salesman problem solver that produces high-quality outputs. JSalesman uses hierarchial and multi-level approaches to solve the problem fast.

Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.