Showing 15 open source projects for "voice command java"

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  • 1
    XOR Tree Generator
    Program for creating Verilog synthesizable XOR trees for high performance designs. Supports creation of Hamming Code (ECC) generators, checkers, and GF2 Multipliers.
    Downloads: 0 This Week
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  • 2

    PLP

    Powerfull pre-processor

    Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)
    Downloads: 1 This Week
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  • 3
    JMCAD - modeling of dynamic systems
    JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual"...
    Downloads: 3 This Week
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  • 4
    An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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    Downloads: 0 This Week
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  • 5
    PHDL

    PHDL

    An HDL alternative to PCB graphical schematic capture tools.

    ...The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.
    Downloads: 0 This Week
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  • 6

    CsvToFootprint

    Convert CSV to Kicad footprint.

    For electronics engineers, when using open source EDA tools, one of big challenge is component schematic symbols and footprints. If you are creating footprints for component with more than 100 pins, it becomes very time consuming and challenging to create error free footprints. Here is a simple program to create footprints for open source EDA kicad. The idea is to describe footprint in .csv format and convert .csv to kicad footprint format. At preset program supports Kicad only, but can be...
    Downloads: 0 This Week
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  • 7
    PPPP is a computer program used for partitioning parameterized orthogonal polygons into parameterized rectangles. With this program, it is possible to build rectangular corner stitching data structure for parameterized VLSI layouts.
    Downloads: 0 This Week
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  • 8
    Processes boolean functions which can be provided either as a list of 0s and 1s or which can be provided as a formula in first-order logic (using disjunctive or conjunctive normal forms). Internally the Quine McCluskey algorithm is used.
    Downloads: 0 This Week
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  • 9
    Java source to C source translator, which allows to write MCU programs in Java. Now AVR are supported, others can be added. Convenient Java methods instead of manual register handling.
    Downloads: 0 This Week
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  • 10
    Signs is a development environment for hardware designs in VHDL and other hardware description languages. It provides synthesis and simulation tools which are fully integrated in an Eclipse plugin including graphical netlist and waveform viewers.
    Downloads: 0 This Week
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  • 11
    Jove - The Open Verification Environment for the Java (TM) Platform
    Downloads: 1 This Week
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  • 12
    Juno - OpenVera (TM) to Jove Translator
    Downloads: 0 This Week
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  • 13
    A GDSII database parser and stream integrity verifier
    Downloads: 0 This Week
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  • 14
    This program converts assembly code to verilog implementation
    Downloads: 0 This Week
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  • 15
    PCB plugin for rat selection. The user supplies a pin list via a text file. The plugin selects the rats which connects the listed pins. This functionality intends to help auto-routing with variable track width. See the web site for more detail.
    Downloads: 0 This Week
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