Search Results for "source code computer"

Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Transient, Noise and Harmonic Balance analysis. Pure digital simulations are also supported.

DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to...

PCB Layout and Schematic capture tool for Win/Linux/Mac. Source code at https://github.com/sergei-iliev/myNetPCB

DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code

Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.

Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.

Circuitmod is a circuit simulator that extend the capacity of the original Falstad's Java Circuit Simulator into CMOS Chips, Led Arrays, Led Matrix and PIC Programming. The Horizon is limitless. Try today.

A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.

JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual"...

We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well as hardware designers to evaluate their code and design. To the best of our knowledge, this is the first open-source library of approximate adders that facilitates reproducible comparisons and further research and development in this direction across various layers of design abstraction. This work is a result of collaborative effort between Chair for Embedded Systems (CES) at Karlsruhe Institute of Technology (KIT), Germany and Vision Image and Signal Processing (VISpro) Lab at SEECS-NUST, Pakistan.

Simcas is a simple and very flexible analog simulator. SimCAS uses symbolic equations to define components and solves the net system by using a "Computer Algebra System" algorithm.

Still struggling with Excel to setup your pick and place machine ? Cad2Board reads component mounting information from Eagle, Altium Designer and Mentor Expedition PCB designs. Component or component groups can be assigned to feeder slots by drag and drop. Any modifications for PCB population can be defined to generate PCB variants, consider rotations from unusual tape and reel packaging or to account in advance for CAD library or PCB design bugs. Generated setup data is stored in a...

rfMaxima is an RF toolbox for the wxMaxima computer algebra system.

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered

vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.

The PARSEC CEE is the primary achievement of several years of effort at NASA's Marshall Space Flight Center. The CEE was developed to allow engineers in the Advanced Concepts Department to rapidly prototype launch vehicle and spacecraft concepts.

Liquid PCB is a Computer Aided Design (CAD) application for designing Printed Circuit Boards. It is unlike any PCB CAD package you have used before. It has innovative user interface, and lets you create freeform tracks without any straight lines.

This project is a collection of tools that are useful for someone working in the computer engineering field. So far this program is able to do logic minimization using the Quine-McClusky Method, numeric base conversion, and some bit manipulations.

audacity-extra now provides a sleek dark themed version of the Audacity open source sound editor. The project experiments with Audacity variations. There's a vowel-sound target-practice display for language learners and an analog waveform data logger for embedded systems.

OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

s2vhdl extracts structural information from SystemC HDL programs. The output is in VHDL code and graphical diagrams. GCC compiler is used as a C++ frontend.

ODog

Libraries and sample code for accessing remote toolpath delivery services such as VoluMill. Although much of the code is specific to the VoluMill service, it also defines open standards for exchanging toolpath information, parameters, and geometry.

libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.

Sk2Py is an wxPython-based IDE which assists in the migration of Cadence Skill(tm)-based PCells to Python PyCells for use in all Open Access environments. Please post any support requests or bug reports to the tracking system.