Search Results for "c compiler vm"
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Showing 11 open source projects for "c compiler vm"
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Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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IEC 60870-5 104 Protocol download
IEC 104 RTU Server Client Simulator Source Code Library Win Linux
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Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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The KontrollerLab is an IDE for developing software for Atmel(r) AVR(c) microcontrollers using the avr-gcc compiler, the uisp and the avrdude upload software.
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Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
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Digital Signal Processing Block Diagram Compiler - user extendable to all DSP's, but presently supports only the TI C2000 family. Rich support for fixed point arithmetic, both saturated and unsaturated. Block diagram entry is via TinyCAD (included).
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s2vhdl extracts structural information from SystemC HDL programs. The output is in VHDL code and graphical diagrams. GCC compiler is used as a C++ frontend.
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XAvrTools is an open source graphical frontend for development with Atmels AVR microcontrollers using the UISP download tool and the AVR-GCC C compiler for LINUX. It is written in C++ using KDevelop and the QT library. It will include a software wizard.
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VHDLC is a VHDL to C++ translator aiming at full VHDL '93 compliance. It provides the translator and supporting VHDL libraries for the target host C++ compiler.
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