Open Source C++ Electronic Design Automation (EDA) Software - Page 4

Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.

CNF-toolkit is a simple library for constructing and manipulating boolean formulae in conjunctive normal form.

Caneda (Circuits and Networks EDA) is an open source EDA software focused on easy of use and portability. While in the short term schematic capture and simulation is the primary goal, in the long term future, PCB and layout edition will be covered.

This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.

This project is a collection of tools that are useful for someone working in the computer engineering field. So far this program is able to do logic minimization using the Quine-McClusky Method, numeric base conversion, and some bit manipulations.

CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).

TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations.

The Danger Shield is an add-on board for an Arduino, an open source microcontroller board. It provides useful inputs and outputs in a simple, self-contained package.

Software I/O Digital Analyzer and Digital Input/Output Simulator for electronics experiments. It's also a 16 digital channel data logger. Hardware supported: Ethernet I/O Card , USB I/O Card and Parallel Interface.

This is a helpful and optimized tool support for Electronic Design Automation Engineer viewing vcd file format.Runing all 32-bit MS Window(95/98/Nt/2000/XP),Linux,Apple Mac OS classic.It is mean to be an open source viewer developed by SELAB-University o

Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.

ENIAC: Electrical Network Interactive Analysis Console. Educational software originally made for the study and simulation of electrical LTI circuits, but which supply also a lot of mathematics computations, like complex, polynomial and matrix operations.

Framework for the Analysis and Modification of EDIF netlists (FAME) is a C++ framework, developed at Politecnico di Torino, aimed at automating the analysis and modification of complex circuit netlists described in the standard EDIF 2.0.0 language.

FERMAT's SystemC Parser using Doxygen and Xerces-C++ XML

Language used: c++ Libraries used: fltk OS: Linux Problem Description: Jtag management software for CPLD and jtag aware chips Major features: X11 UI, c++ platform for jtag apps Data formats: jtag, bsdl, binary Derived from existing project "jtag"

This project aims at using the Artificial Intelligence (AI) algorithm called the Genetic algorithm to solve the problem of placement in the FPGA circuits.

FPGAsm is a low-level alternative to verilog and VHDL. A near-instant 'assembler for FPGAs', this simple yet powerful language facilitates bottom-up design, layout and wiring of modules, and generation of .xdl output. With about 10 keywords to learn, you can start making circuits in minutes. Now you can focus on learning the ins and outs of the FPGA instead of complex tools and languages. Fast turnaround time and bottom-up approach invite exploration, experimentation, live circuit testing and physical test harness creation, radically changing the workflow. FPGAsm offers you an opportunity to REALLY understand Xilinx FPGAs, create circuits DIRECTLY on the FPGA using an opensource tool, and share your knowlege and projects with the community. Supported architectures: Xilinx (via xdl)

FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.

FXtransformer Designer is a graphical design aid for both power and RF transformers. RF Design: Broadband, Single-Tuned, Double-Tuned.

FXTurns-n-Layers is a graphical transformer and induction coil design aid. The program allows you to determine: the length (feet) and weight (lbs.) of wire needed to wind a coil. The program calculates the coil's finished dimensions and total resistance,

Given a circuit described in terms of common CMOS logic gates, this is capable of minimizing logic area by repetitive examination of sets of three gates, utilizing a pre-computed lookup table of pre-optimized replacements. Reductions include XOR gates and can be extended to 3-input logic gates.

FreePCB is a PCB layout editor for Windows. It is easy to learn and easy to use, yet capable of professional quality work. It imports PADS-PCB netlists, and exports industry-standard Gerber RS-274X and NC-drill files.

G2C (Geospatial to Civil) The LandGML Interoperability Experiment initiated by Autodesk, U.S. Army Corps of Engineers Engineering Research and Development Center, and Galdos Systems. this open source tool transforms LandGML into LandXML documents.

A GDSII Viewer that reads a standard GDSII file format and displays the contents of the file in a graphical format. It allows the viewer to zoom and pan the contents of the file.