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esweep is a scriptable audio measurement program which features various signals and signal processing functions. Its main purpose is the measurement of speakers.
Modelio-Open is a project hosting a set of open source extensions (SoaML, SysML and UML Testing Profile) for a previous version (1.2) of the Modelio Free tool .
Currently, the lastest version (2.x) of Modelio modeling and generation tool is available at http://modelio.org/downloads/download-modelio.html. All extensions are downloadable at http://forge.modelio.org/projects.
O Projeto Cleusa - É uma interface de Gerenciamento de dispositivos.
O projeto ROSANA aciona ações nos relês.
O projeto Cleusa utiliza uma dispositivo de Hardware especifico, porem pode ser compatibilizado com qualquer outro hardware.
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ReliaFree is a Python and PyGTK based suite of tools to assist in Reliability, Availability, Maintainability, and Safety (RAMS) analyses. ReliaFree is intended to be an Open Source alternative to proprietary RAMS analyses solutions.
Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
SCLive is a modular Linux-Live Distribution dedicated to the OSCI SystemC simulator and it's associated libraries. The distribution provides a fully working environement including a simulator kernel, wavefom viewer, IDE, tutorials and more.
IMPORTANT: The flosslogic project has merged with the sigrok project. Development continues in the sigrok wiki, mailing lists, IRC channel, and git repository.
Wcalc is a tool for the analysis and synthesis of electronic components. Some of the models include coupled microstrip lines, single layer air core solenoid inductors, etc. Wcalc can analyze the electrical parameters based on the physical dimensions a
The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.
NGerber is a small class library that allows .NET applications to easily write Gerber files (commonly used for EDA to specify circuit board layouts). Gerber files created with this library are compatible with the RS-274-X standard.
An easy to use spice interface with GTK. This project allows to start and view the simultions with one or two click. It uses gschem for the schematics and ngspice as simulator.
Spice+ is a general-purpose circuit simulation program, based directly on SPICE 3F.5 from the University of California (Berkeley). An improved version of Spice for DOS, Windows and Linux. http://spicep.sourceforge.net
The comprehensive C++ library MGEN for IC layout and connectivity comes with the X11/Motif full custom layout editor PARIS and the powerful waveform viewer/processor MANIAC. Industry proven, it is the basis for layout generators, placers, routers etc.
XSpiceHDL, an XSpice-VerilogHDL co-simulator incorporates a Schematic Capture GUI, modified run-time DLL capable XSpice3f5 based engine with Berkley Sockets IPC via CodeModel & PLI 1.0/2.0(VPI) DLLs, all in C++, wxWidgets & MSVC++ 6.0.
Much like SPICE does for circuit designers, SUGAR provides for MEMS designers a tool for quickly specifying their devices in a netlist type format and analyzing their devices with different simulation and mathematical techniques.
SpiceX is a simple schematic capture program for graphical interaction with Spice-based electronic simulation cores, i.e., placing components, wires and test points. SpiceX creates NETLISTs and runs simulations directly from the GUI.
Efficient Symbolic Tools package (EST) is a BDD based tool for the formal verification of concurrent systems. Its advantages are flexibility, portability and an efficient memory management. It runs under different OS, including Linux and Windows 2000/XP.
A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.
A GTK+/Gnome2 graphical front end for the IW3HEV Vector Network Analyzer, also has a signal generator, and It displays graphicaly SWR, Phase, Return Loss, X impedance, Serial resistance, |Z| Impedanze, and Inductance, and capacitance.
This is an easy-2-use Printed Circuit Board designer program with user-friendly interface and with some interesting capabilities. The full source and the internals are well documented.