openDLX is a DLX/MIPS ISA compatible pipeline simulator.
(Visit https://github.com/smetzlaff/openDLX for the latest development version or if You want to contribute.)
An Education Microprocessor Simulator, based off the a design by Charles Stroud (http://www.eng.auburn.edu/~strouce/ausim.html), this will extend the capabilities and UI of the original and will have a VHDL implementation for educational purposes.
A graphical simulator for the LC3 processor, concentrating on the micro-architecture level.
The processor is thoroughly described in "Introduction to Computing Systems: From Bits & Gates to C & Beyond" by Yale Patt and Sanjay Patel (ISBN-0-07-246750-9
JPACS, Java Processor and Cache Simulator, was developed to give a simple and clear tool to simulate a processor with a complete associative memory cache at ISA level, using direct memory access or using a program written in assembly.
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Tori assim is an assembler for the educational Txori assembly language and simulator for the bird processor. It's being developed as an open source clone for the closed source and windows only BIRD.
DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.