Search Results for "state machine"

Dlib is a C++ toolkit containing machine learning algorithms and tools for creating complex software in C++ to solve real world problems.

...In particular for C, HWUT supports make file generation using 'sos' and 'sols' modes. Remote control-able function stubs may be generated using the 'stub' mode. Test cases can be generated using the 'gen' mode, and state machine walkers by the 'sm_walker' mode. Over the last decade HWUT has matured towards a full fledged unit test tool for a wide variety of applications.

PLEASE READ THE PLATFORM SPECIFIC INSTRUCTIONS UNDER Files , ALSO FOUND IN README.txt, BEFORE DOWNLOADING!!! ra is a programming language and machine. Programs for ra are built from a small set of primitive control statements and a small set of operations. Although they contain no explicit types they are based on two primitive types, string and number, and a high order type, table. When called with the -d option ra includes commands for starting and stopping program execution and examining program state.

SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

This application may be used to generate a full-featured software state machine using a high-level description language. Several state machines can be placed into the same source file and they can reference one-another to create nested state machines. Any arbitrary code can be associated with any state transition. Inline code is supported. Any code may also be defined to be run before the start state is entered as well as after the end state is finished. ...

A tool to generate state machine graphs based on specially formatted comments in C and C++ code. The generated output is a Graphviz dot input file.

The software generates automatically concurrency control code based on a given specification. Specifications consist of a description of the concurrency constraints, a state machine description of the processes and/or threads that are to be coordinated, and the C code associated with each state of the state machines. The output of the software is a C program containing the implementation of the concurrency constraints and the segments of code given in the specification.

The Crystallizing Substochastic Sequential Machine Extractor, CrySSMEx, is an algorithm for extracting Finite State Machines from Recurrent Neural Networks. Input: sequential data generated from RNNs. Output: (stochastic) FSMs and state space quantizers.

Torch5 provides a matlab-like environment for state-of-the-art machine learning algorithms. It is easy to use and provides a very efficient implementation, thanks to a easy and fast scripting language (Lua) and a underlying C++ implementation.