Search Results for "software solution design"
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Showing 30 open source projects for "software solution design"
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FMOCPP
Eclipse C/C++ MinGW MSYS2
The project aims to simplify the combined use of Eclipse, MinGW, and MSYS2 by providing a more accessible solution for preparing the development environment, compiling source code, and running C/C++ applications. In this way, students can focus on learning the fundamentals of programming, computational logic, and software solution development, while reducing the initial technical difficulties related to system paths, compilers, terminals, and dependencies. -
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U++
C++ framework with an ide.
U++ is BSD licensed C++ cross-platform rapid application development framework focused on programmers productivity without sacrificing runtime performance. Based on strictly deterministic design it provides an alternative to GC collected platforms. -
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C3PO is a software synthesis tool that provides a solution for building maintainable, reliable and robust software infrastructures and/or compiler frontends from a set of attributed grammar rules in EBNF notation.
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ELENA Programming Language
an object-oriented language with late binding
ELENA is a general-purpose, pure object-oriented language with late binding. It promotes more object-oriented program design, reusable and more standardized code. The package includes compiler, IDE, ELENA libraries and samples -
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MANOOL
Programming language with expressive power and a simple implementation
MANOOL is a practical, homoiconic, dynamic, multiparadigm general-purpose programming language with a functional core. It has high expressive power but is implemented in less than 10K LOC of optimized, idiomatic C++11 for native run-time environments. MANOOL is meant to compare and compete directly with Python, PHP, Ruby, Perl, and Tcl, although incidentally it has some combination of unusual features. Example: {{extern "manool.org.18/std/0.2/all"} in WriteLine[Out; "Hello,... -
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APTOS is an open source Apt translator project. It consists of several CAM applications, based on the Apt programming language. It is used to create control programs for cnc mills, lathes, water jets, lasers, and other industrial equipment.
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Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
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Chapel
a Productive Parallel Programming Language
Chapel is an emerging parallel programming language whose design and development are being led by HPE in collaboration with academia, computing labs, and industry. Chapel's goal is to improve the productivity of parallel programmers, from laptops to supercomputers. **Please note that Chapel development has moved to GitHub** -
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Project 2306 IDE Rad MacOS MCU DeveR
Electronic design and programming tools suite like Eagle, MpLab
...All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned Features : Similar with mainstream market tools IDE and GUI Wrapper like : LabView©, Proteus©, MPLab©, Eagle CAD©, Tools Suite for Most Market Microcontroller. Tools suite for Arduino, Pinguino, Pic, AVR, ARM, Basic Stamp, Risc, other platform Fully Integrated IDE. ... -
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Concurrent Object-Oriented Language
An object oriented language for concurrent software development
COOL is an object oriented programming language specialized for concurrent software development. Language syntax is similar to C++/C# and Java. For proper documentation please read the diploma thesis (Only available in german yet). Some of the goals to achieve: - Embedding some design-patterns on language level (singleton, state-pattern) - Implementation of a back-end for byte-code generation - Extending the compiler with an optimization phase for optimizing byte-code - Optimizing the interpreter to improve runtime performace... -
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HIPAcc
Heterogeneous Image Processing Acceleration (HIPACC) Framework
HIPAcc development has moved to github: https://github.com/hipacc HIPAcc allows to design image processing kernels and algorithms in a domain-specific language (DSL). From this high-level description, low-level target code for GPU accelerators is generated using source-to-source translation. As back ends, the framework supports CUDA, OpenCL, and Renderscript. HIPAcc allows programmers to develop imaging applications while providing high productivity, flexibility and portability as well... -
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FPGAsm
Create fast bare-metal FPGA designs without Verilog or VHDL
FPGAsm is a low-level alternative to verilog and VHDL. A near-instant 'assembler for FPGAs', this simple yet powerful language facilitates bottom-up design, layout and wiring of modules, and generation of .xdl output. With about 10 keywords to learn, you can start making circuits in minutes. Now you can focus on learning the ins and outs of the FPGA instead of complex tools and languages. Fast turnaround time and bottom-up approach invite exploration, experimentation, live circuit... -
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OpenBlocks C++ Library
A C++ Implementation of the MIT OpenBlocks Java Code
Please see more details under: http://education.mit.edu/openblocks. I have rewritten the parser and an OpenGL 2D/3D renderer of computer programs written in OpenBlocks. I provide here the full source code and a Microsoft Visual C++ 2005 Solution File. The code includes the C++ Library and a demo driver application that constructs a computer program using OpenBlocks and displays it using OpenGL. -
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Wittgen
WIttgen is a two-instruction programming language modeled on the mind.
The Wittgen programming language consists of just two instructions and one special variable name. Wittgen allows you to assign any text string to a variable of any name. It also allows you to retrieve the text assigned to that variable. Lastly, it has a special variable called “Doing Now”. Every execution step consists of retrieving the contents of Doing Now, removing the first assign found in that content and performing that assign. In the course of performing that assign any retrieve... -
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Stampede contains all elements of a design environment for the Stamp microcontroller. It supports compilation, downloading, and full two-way communication with the Stamp. Additionally, it allows the Stamp to write text and binary files on the host.
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Generate parsers with ease, using a graphical user interface, or console. Design your parsers graphically or by using standard regular expressions and BNF syntax similar to lex/yacc. Generated parsers can be in C or C++.
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Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.
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Generate a parser at runtime from a collection of C++ objects. Concisely state a parser specification in ordinary C++ code. Learn from a parser generator with an object-oriented design.
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An efficient shader compiler, a simple and practical solution for managing shader files in 3d engine projects. Editing fx files is just as easy as editing c files with its help. It provides a lot more than fxc.exe. (key words: HLSL,GLSL,DirectX,CG)
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C into assembly language converter producing asm files, specific optimizations for different chip manufacturers (Intel, AMD and Transmeta), written in C/C++ with OOP design, designed to be multiplatform
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XOgastan is an API that allow to write programs that takes in input the file containing the ast generated by gcc and to analyze them. Using it you can collect informations about the generic C program represented by the AST (Tree) dumped by gcc.
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MEDDAC is the seeding point for designing a new approach to Operating System design itself. It is an Open Source project with roots in mainframe design and development the author began in 1979. Monitor Editor Disassembler Decompiler Assembler Compiler
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Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.