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[Xbox-linux-cvs] cromwell/boot_rom 2bBootStartup.S,1.12,1.13 2bconsts.h,1.2,1.3
|
From: <ham...@us...> - 2003-08-18 18:44:28
|
Update of /cvsroot/xbox-linux/cromwell/boot_rom
In directory sc8-pr-cvs1:/tmp/cvs-serv20822/cromwell/boot_rom
Modified Files:
2bBootStartup.S 2bconsts.h
Log Message:
repaired starting problems on 1.0 box, very mysterious, but now it works
Index: 2bBootStartup.S
===================================================================
RCS file: /cvsroot/xbox-linux/cromwell/boot_rom/2bBootStartup.S,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- 2bBootStartup.S 18 Aug 2003 15:08:57 -0000 1.12
+++ 2bBootStartup.S 18 Aug 2003 18:44:25 -0000 1.13
@@ -41,17 +41,6 @@
#define xcode_END(val1) .byte 0xEE; .long val1 ; .long 0x0;
-#define SMBUS 0x0000c000
-#define MEMORY0 0x00000000
-#define MEMORY1 0x00000010
-#define MEMORY2 0x00000020
-#define MEMORY3 0x00000030
-#define MEMORY4 0x04000000
-#define MEMORY5 0x04000010
-#define MEMORY6 0x04000020
-#define MEMORY7 0x04000030
-
-
.code32
.section .low_rom, "ax"
@@ -93,23 +82,14 @@
// Here, the Bytecode interpretor starts
.org 0x80
- // Enable IO Bar (this is for 1.1 Boxes);
xcode_pciout(0x80000884, 0x00008001);
- // Enable APCI IO space
xcode_pciout(0x80000804, 0x00000003);
xcode_outb(0x00008049, 0x00000008);
xcode_outb(0x000080d9, 0x00000000);
xcode_outb(0x00008026, 0x00000001);
-
- // Enable the Graphic Card
xcode_pciout(0x8000f04c, 0x00000001);
xcode_pciout(0x8000f018, 0x00010100);
-
- // Map the PCI devices to a lower address to make them visible for XCodes
-
- // Set the maximum memory to 128MB
xcode_pciout(0x80000084, 0x07ffffff);
-
xcode_pciout(0x8000f020, 0x0ff00f00);
xcode_pciout(0x8000f024, 0xf7f0f000);
xcode_pciout(0x80010010, 0x0f000000);
@@ -121,25 +101,39 @@
xcode_poke(0x0f0010b0, 0x07633461);
xcode_poke(0x0f0010cc, 0x66660000);
+
+
xcode_peek(0x0f101000);
+
xcode_bittoggle(0x000c0000,0x00000000);
+
xcode_ifgoto(0x00000000,6);
+
+
+
xcode_peek(0x0f101000);
+
xcode_bittoggle(0xe1f3ffff,0x80000000);
+
+
xcode_poke_a(0x0f101000);
xcode_poke(0x0f0010b8, 0xeeee0000);
xcode_goto(11);
+
xcode_ifgoto(0x000c0000,6);
+
xcode_peek(0x0f101000);
xcode_bittoggle(0xe1f3ffff,0x860c0000);
xcode_poke_a(0x0f101000);
+
xcode_poke(0x0f0010b8, 0xffff0000);
xcode_goto(5);
xcode_peek(0x0f101000);
+
+
+
xcode_bittoggle(0xe1f3ffff,0x820c0000);
xcode_poke_a(0x0f101000);
-
- // memory bus Trimm
xcode_poke(0x0f0010b8, 0xffff0000);
xcode_poke(0x0f0010d4, 0x00000009);
xcode_poke(0x0f0010b4, 0x00000000);
@@ -149,120 +143,90 @@
xcode_poke(0x0f0010d8, 0x00000000);
xcode_poke(0x0f0010dc, 0xa0423635);
xcode_poke(0x0f0010e8, 0x0c6558c6);
-
-
xcode_poke(0x0f100200, 0x03070103);
xcode_poke(0x0f100410, 0x11000016);
xcode_poke(0x0f100330, 0x84848888);
xcode_poke(0x0f10032c, 0xffffcfff);
xcode_poke(0x0f100328, 0x00000001);
xcode_poke(0x0f100338, 0x000000df);
-
- // Set up the SM - bus controller
xcode_pciout(0x80000904, 0x00000001);
xcode_pciout(0x80000914, 0x0000c001);
xcode_pciout(0x80000918, 0x0000c201);
- xcode_outb(0x0000c200, 0x00000070);
-
-
- // Connexant
- /*
- we have to send him the following:
- I2Ctransmit(0x8a,0xba,0x3f);
- I2Ctransmit(0x8a,0x6c,0x46);
- I2Ctransmit(0x8a,0xb8,0x00);
- I2Ctransmit(0x8a,0xce,0x19);
- I2Ctransmit(0x8a,0xc6,0x9c);
- I2Ctransmit(0x8a,0x32,0x8);
- I2Ctransmit(0x8a,0xc4,0x1);
- */
- xcode_outb(SMBUS+4, 0x0000008a);
- // I2Ctransmit(0x8a,0xba,0x3f);
- xcode_outb(SMBUS+8, 0x000000ba);
- xcode_outb(SMBUS+6, 0x0000003f);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // I2Ctransmit(0x8a,0x6c,0x46);
- xcode_outb(SMBUS+8, 0x0000006c);
- xcode_outb(SMBUS+6, 0x00000046);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // I2Ctransmit(0x8a,0xb8,0x00);
- xcode_outb(SMBUS+8, 0x000000b8);
- xcode_outb(SMBUS+6, 0x00000000);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+ xcode_outb(0x0000c200, 0x00000070);
+ xcode_outb(0x0000c004, 0x0000008a);
+ xcode_outb(0x0000c008, 0x000000ba);
+ xcode_outb(0x0000c006, 0x0000003f);
+ xcode_outb(0x0000c002, 0x0000000a);
- // I2Ctransmit(0x8a,0xce,0x19);
- xcode_outb(SMBUS+8, 0x000000ce);
- xcode_outb(SMBUS+6, 0x00000019);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // I2Ctransmit(0x8a,0xc6,0x9c);
- xcode_outb(SMBUS+8, 0x000000c6);
- xcode_outb(SMBUS+6, 0x0000009c);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
+ xcode_inb(0x0000c000);
xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
- // I2Ctransmit(0x8a,0x32,0x8);
- xcode_outb(SMBUS+8, 0x00000032);
- xcode_outb(SMBUS+6, 0x00000008);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x0000006c);
+ xcode_outb(0x0000c006, 0x00000046);
+ xcode_outb(0x0000c002, 0x0000000a);
+
+ xcode_inb(0x0000c000);
xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x000000b8);
+ xcode_outb(0x0000c006, 0x00000000);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- // I2Ctransmit(0x8a,0xc4,0x1);
- xcode_outb(SMBUS+8, 0x000000c4);
- xcode_outb(SMBUS+6, 0x00000001);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x000000ce);
+ xcode_outb(0x0000c006, 0x00000019);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x000000c6);
+ xcode_outb(0x0000c006, 0x0000009c);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- // PIC SLAVE Address (Write)
- xcode_outb(SMBUS+4, 0x00000020);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x00000032);
+ xcode_outb(0x0000c006, 0x00000008);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- // I2Ctransmit(0x20,0x1,0x0);
- xcode_outb(SMBUS+8, 0x00000001);
- xcode_outb(SMBUS+6, 0x00000000);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // PIC SLAVE Address (Read)
- xcode_outb(SMBUS+4, 0x00000021);
-
- // I2Cgetbyte(0x8a,0x1);
- xcode_outb(SMBUS+8, 0x00000001);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // If SMC version does not match ... ?????
- xcode_inb(SMBUS+6);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x000000c4);
+ xcode_outb(0x0000c006, 0x00000001);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c004, 0x00000020);
+ xcode_outb(0x0000c008, 0x00000001);
+ xcode_outb(0x0000c006, 0x00000000);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c004, 0x00000021);
+ xcode_outb(0x0000c008, 0x00000001);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_inb(0x0000c006);
xcode_ifgoto(0x00000050,2);
+
xcode_goto(2);
- // this is only done, if the 0x50 does not match
- xcode_pciout(0x8000036c, 0x01000000);
+ xcode_pciout(0x8000036c, 0x01000000);
xcode_poke(0x0f680500, 0x00011c01);
xcode_poke(0x0f68050c, 0x000a0400);
xcode_poke(0x0f001220, 0x00000000);
@@ -279,6 +243,8 @@
xcode_poke(0x0f001214, 0x09090909);
xcode_poke(0x0f00122c, 0xaaaaaaaa);
xcode_goto(3);
+
+
xcode_poke(0x0f001214, 0x09090909);
xcode_poke(0x0f00122c, 0xaaaaaaaa);
xcode_poke(0x0f001230, 0xffffffff);
@@ -304,9 +270,14 @@
xcode_poke(0x0f001250, 0x0000aa8b);
xcode_poke(0x0f100228, 0x081205ff);
xcode_poke(0x0f001218, 0x00010000);
+
xcode_pciin_a(0x80000860);
xcode_bittoggle(0xffffffff,0x00000400);
+
+
xcode_pciout_a(0x80000860);
+
+
xcode_pciout(0x8000084c, 0x0000fdde);
xcode_pciout(0x8000089c, 0x871cc707);
xcode_pciin_a(0x800008b4);
@@ -321,8 +292,6 @@
xcode_goto(1);
xcode_poke(0x0f100200, 0x03070103);
xcode_poke(0x0f100204, 0x11448000);
-
- // Clear the Memory Test registers
xcode_pciout(0x8000103c, 0x00000000);
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
@@ -330,55 +299,53 @@
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
- // I2Ctransmit(0x8a,0xba,0x3f);
- xcode_outb(SMBUS+4, 0x0000008a);
- xcode_outb(SMBUS+8, 0x000000ba);
- xcode_outb(SMBUS+6, 0x0000003f);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // I2Ctransmit(0x8a,0x6c,0x46);
- xcode_outb(SMBUS+8, 0x0000006c);
- xcode_outb(SMBUS+6, 0x00000046);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
+ xcode_outb(0x0000c004, 0x0000008a);
+ xcode_outb(0x0000c008, 0x000000ba);
+ xcode_outb(0x0000c006, 0x0000003f);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- xcode_outb(SMBUS+4, 0x0000008a);
- xcode_outb(SMBUS+8, 0x000000ba);
- xcode_outb(SMBUS+6, 0x0000003f);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
-
- // I2Ctransmit(0x8a,0xce,0x19);
- xcode_outb(SMBUS+8, 0x0000006c);
- xcode_outb(SMBUS+6, 0x00000046);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x0000006c);
+ xcode_outb(0x0000c006, 0x00000046);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- xcode_outb(SMBUS+4, 0x0000008a);
- xcode_outb(SMBUS+8, 0x000000ba);
- xcode_outb(SMBUS+6, 0x0000003f);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c004, 0x0000008a);
+ xcode_outb(0x0000c008, 0x000000ba);
+ xcode_outb(0x0000c006, 0x0000003f);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
- xcode_outb(SMBUS+8, 0x0000006c);
- xcode_outb(SMBUS+6, 0x00000046);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
- xcode_ifgoto(0x00000010,-1)
- xcode_outb(SMBUS, 0x00000010);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x0000006c);
+ xcode_outb(0x0000c006, 0x00000046);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c004, 0x0000008a);
+ xcode_outb(0x0000c008, 0x000000ba);
+ xcode_outb(0x0000c006, 0x0000003f);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+
+ xcode_outb(0x0000c000, 0x00000010);
+ xcode_outb(0x0000c008, 0x0000006c);
+ xcode_outb(0x0000c006, 0x00000046);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
+ xcode_ifgoto(0x00000010,-1);
+
+
+
+ xcode_outb(0x0000c000, 0x00000010);
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
@@ -418,34 +385,27 @@
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
xcode_pciout(0x80000884, 0x00008001);
-
-
- xcode_outb(SMBUS, 0x00000010);
-
-/* ---- Report Memory Size to PIC scratch register ---- */
-
+ xcode_outb(0x0000c000, 0x00000010);
+
xcode_pciin_a(0x8000183c);
xcode_bittoggle(0x000000ff,0x00000000);
- xcode_outb_a(SMBUS+6);
- xcode_outb(SMBUS+8, 0x00000012);
- xcode_outb(SMBUS+2, 0x0000000a);
- xcode_inb(SMBUS);
+ xcode_outb_a(0x0000c006);
+ xcode_outb(0x0000c008, 0x00000012);
+ xcode_outb(0x0000c002, 0x0000000a);
+ xcode_inb(0x0000c000);
xcode_ifgoto(0x00000010,-1);
- xcode_outb(SMBUS, 0x00000010);
-
-/* ---- Reload Nvidia Registers ------------------------*/
-
+ xcode_outb(0x0000c000, 0x00000010);
xcode_pciout(0x8000f020, 0xfdf0fd00);
xcode_pciout(0x80010010, 0xfd000000);
-
- // overflow trick
xcode_poke(0x00000000, 0xfc1000ea);
xcode_poke(0x00000004, 0x000008ff);
xcode_END(0x806);
- /**************** FINE **********************/
+
+
+
// Note: never change this from offset 0x1000 ....
// This is the Main Entry point ....
@@ -699,12 +659,10 @@
clts
fninit
- //jmp BootStartBiosLoader
-
-
-
-/* ------------------------ we can clear out everything below ? ------------------ */
+
+ mov $0x80000810, %eax ; movw $0xcf8, %dx ; outl %eax, %dx ; movw $0xcfc, %dx ; mov $0x8001, %eax ; outl %eax, %dx // v1.0 ACPI IO region enable
+ mov $0x80000884, %eax ; movw $0xcf8, %dx ; outl %eax, %dx ; movw $0xcfc, %dx ; mov $0x8001, %eax ; outl %eax, %dx // v1.1 "
movw $0x8026, %dx ; movw $0x2201, %ax ; outb %al, %dx // extsmi# able to control power (b0<-0 causes CPU powerdown after couple of seconds)
mov $0x80000804, %eax ; movw $0xcf8, %dx ; outl %eax, %dx ; movw $0xcfc, %dx ; mov $0x3, %eax ; outl %eax, %dx
@@ -788,7 +746,7 @@
mov $0x8000093c, %eax ; movw $0xcf8, %dx ; outl %eax, %dx ; movw $0xcfc, %dx ; inl %dx, %eax ; orl $0x7, %eax ; outl %eax, %dx // I2C int=7
movw $0xc200, %dx ; movb $0x70, %al ; outb %al, %dx
-
+// movw $0xc002, %dx ; movb $0x10, %al ; outb %al, %dx // enable I2C interrupt
// skipped unnecessary conexant init
@@ -906,7 +864,7 @@
outl %eax, %dx
jmp BootStartBiosLoader // this can be found in BootResetAction.c
-
+
/*
@@ -914,7 +872,6 @@
*/
-#ifdef USE_HIGH_SECTION_EXIT
/************************************************************
the linker locates this file at the top
@@ -922,7 +879,7 @@
*/
////////////////////////////////////////////
// High ROM
-
+#if 0
.section .high_rom, "ax"
.code32
.global sizeof_top
@@ -965,4 +922,3 @@
.equ sizeof_top, (. - start_top)
#endif
-
Index: 2bconsts.h
===================================================================
RCS file: /cvsroot/xbox-linux/cromwell/boot_rom/2bconsts.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- 2bconsts.h 5 Aug 2003 19:45:06 -0000 1.2
+++ 2bconsts.h 18 Aug 2003 18:44:25 -0000 1.3
@@ -15,8 +15,6 @@
* *
***************************************************************************/
-#undef USE_HIGH_SECTION_EXIT
-
#define PCI_CFG_ADDR 0x0CF8
#define PCI_CFG_DATA 0x0CFC
@@ -73,4 +71,9 @@
#define DEV_1f 0x1f
#define FUNC_0 0
-
+/*
+#define boot_post_macro(value) \
+ movb $(value), %al ;\
+ outb %al, $0x80
+*/
+/* Filtror debug stuff 4K block used for communications */
|