Application simplifies the development and management of VHDL projects. The project is displayed in a well-arranged tree structure depending on the hierarchy of entities. It also helps to maintain projects in a consistent state. Other features include automatic generation of VHDL testbenches and structures based on user-defined templates. The NetBeans platform is used as a basis for the implementation.

Features

  • VHDL syntax coloring
  • Project tree structure
  • Generating testbenches from existing entities
  • Generating new code from templates
  • Checking consistency of vhdl projects (components, instances, signals)
  • Nbm plugin for syntax coloring in NetBeans IDE
  • Reusable VHDL Parser
  • Manual is available only in czech version. I'll try to translate it soon. App is however very intuitive to use!

Project Samples

main window templates dialog inconsistencies dialog

Project Activity

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Categories

Code Generators, Design, Admin Templates

License

GNU General Public License version 3.0 (GPLv3)

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Additional Project Details

Languages

Czech, English

Intended Audience

Information Technology, Education, Developers, End Users/Desktop, Testers, Engineering

User Interface

Java Swing

Programming Language

VHDL/Verilog, Java

Related Categories

VHDL/Verilog Code Generators, VHDL/Verilog Design Software, VHDL/Verilog Admin Templates, Java Code Generators, Java Design Software, Java Admin Templates

Registered

2012-12-11
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