From: Jeff D. <jd...@ad...> - 2004-06-10 01:01:54
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bla...@ya... said: > I don't think that a flush of fewer TLBs would be faster; what (In My > Ignorant Opinion) slows things down is not clearing a buffer (it will > probably cost 1 cycle, if they put a RESET pin in the TLBs), but > reloading its content when memory is read; > Well, actually it comes to changing 2 segments descriptors (the ones > for USER_CS and USER_DS) > Well, using segments here means that the CS and DS descriptor limit > are lowered, not that I increase base_addr - are you sure that this > would have a cost? Currently the check is not "disabled" - just the > check value is MAX_PTR (0xffff....). Yes, the CPUs could be smart > enough to optimize the check out... You are being way too casual and hard-waving about all this. I've heard scary numbers for all of these. > I'll try to see if Intel manuals say anything about this. Yes, spend some quality time with the Intel manuals, and see what they say. > Well, this is the most important one... I'll try to investigate on > this. Actually, the most important factor to me is virtual address space. Jeff |