Re: [perfmon2] deterministic event on 8-core Intel i7 processor
Status: Beta
Brought to you by:
seranian
From: stephane e. <er...@go...> - 2010-03-25 18:24:07
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On Thu, Mar 25, 2010 at 7:20 PM, Vince Weaver <vwe...@ee...> wrote: > On Thu, 25 Mar 2010, stephane eranian wrote: > >> vince, >> >> Could you make your program such it has only 1 billion instructions? >> I want to see if there is some correlation with counter overflows. >> They are actually only 31 bit on Intel. > > sure, I've attached the 1 billion instruction version. > > I'm also working on a few memory microbenchmarks too to see if I can maybe > find any patterns in the retired_stores cases. > I strongly believe this is related to interrupts. That's the only explanation for the fluctuations. Furthermore, it's not the PMU interrupts, because those, I assume, are constant for this test program. |