[perfmon2] RETRACT [PATCH 1/1] Fix bug with uninitialized interrupting pmds in a set on POWER v3

[Corey A. <cja...@us...>]

Hi Stephane,

I found that there's a flaw in the idea of masking the lower
31 bits of the counter in pfm_arch_restore_pmds.  This would work ok if 
all of the registers are hardware and 31 bits wide, but they are not. 
So the masking code needs to move into the chip-specific code in 
perfmon_power6.c (etc.)

I will re-work the patch again and submit it tomorrow.

Sorry for the confusion,

- Corey

Corey Ashford wrote:
> Stephane,
> 
> I've made the following changes to v2 of the patch:
> 
> * Changed the new function name as we discussed, to 
> pfm_arch_clear_pmd_ovfl_cond()
> 
> * Removed the code that sets the upper bit of the PMD register in the 
> restore code depending upon the povfl_mask.
> 
> * Modified the POWER implementation of the pfm_arch_clear_pfm_ovfl_cond 
> function so that it only clears the interrupting pmds.
> 
> Thanks for your consideration,
> 
> - Corey
> 

-- 
Corey Ashford
Software Engineer
IBM Linux Technology Center, Linux Toolchain
Beaverton, OR
503-578-3507
cja...@us...