Re: [openwince-list] jtag: Automatic Xilinx data file generator

[evan f. <eva...@gm...>]

>- level 0: adapter has I/O pins that can be toggled on or off.
>
>- level 1: adapter can shift in/out bits on its own
>           and generate TCK pulses
>
>- level 2: adapter knows about JTAG and has an API to do
>           basic IR/DR scans etc.
>
>- level 3: adapter knows about target device and can perform complex
>           operations, like reprogramming flash, set breakpoints etc,

I figured that it would make all adapters at least emulate level 2.
That way the interface wouldn't care what type of connection it was
on. (until say a timing error was encountered)
Yes things like clock timing and reset are low level but they are all
part of the initialization of level 1 and should be forwarded up
through level 2. Flash reprogramming and breakpoints are things
specific to each device. I think they should be separate from the
interface some how. I am not sure how. Then the server/hub/daemon only
has to initialize the adapter, scan the chain for level 3 and load the
data for the required chips.

>On the other hand I have seen a lot of open source projects making great plans.
>Almost never something comes out of this.

I have seen some very big plans come to fruition the gEDA project for
example is working out some very big things write now to handle back
annotation in VHDL to a schematic symbol. They also have some people
working on building a parts/symbols/footprint database to connect all
the schematics symbols to part numbers to footprints. You are being
negative in my opinion.

>So back to the original proposal:
>Should I improve the website?

Yes the website needs and update. The patches should be applied (at
least a few) and it should be posted.

>Who do I need to contact?

Well whoever is on the list

>Is jtag still maintained?

Well patches seem to be coming in. But they don't seem to be getting
put into a release. At the very least they should be put on the page.
That way if you need to use a specific chip you can get the main
version and the chip specific patches. This thing clearly needs a
clean up but it should at least get one final release before another
major rework is undertaken. I just want to know if/before I get
involved where that should go.

>By whom?

I guess whoever takes the responsibility. You and I want it, why not
give it a try. I figure the worst case is I fail because I plan to
big. But the only way to know a plan is to big is to try and fail. My
only plan right now is to through these ideas around and try to get
the old version to compile with as many new patches as possible.
Hopefully I can get the people who have the hardware to test it will
test it on their stuff when the need comes up. Patches for a lot of
things were coming in until it was realized by the greater public that
the project was not fitting them into a release.

-- 
http://www.coe.neu.edu/~efoss/
http://evanfoss.googlepages.com/