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[openMSX-commits] [SCM] openMSX (main) branch master updated. RELEASE_0_9_1-454-geb877ed
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From: Manuel B. <man...@us...> - 2013-06-15 12:57:13
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The branch, master has been updated
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from 55b726b6447b86052935c9e82d79bae8dcebdf46 (commit)
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- Log -----------------------------------------------------------------
commit eb877eded391c30760a692c3889ed6cce59f6b5a
Author: Manuel Bilderbeek <Man...@gm...>
Date: Sat Jun 15 14:56:12 2013 +0200
Implemented ASCII16 with 8kB SRAM, thanks to hap for the info.
-----------------------------------------------------------------------
Summary of changes:
share/softwaredb.xml | 2 +-
src/memory/RomAscii16_2.cc | 20 ++++++++++++--------
src/memory/RomAscii16_2.hh | 4 +++-
src/memory/RomFactory.cc | 5 ++++-
src/memory/RomInfo.cc | 1 +
src/memory/RomTypes.hh | 1 +
6 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/share/softwaredb.xml b/share/softwaredb.xml
index c773a2a..f0c8a2e 100644
--- a/share/softwaredb.xml
+++ b/share/softwaredb.xml
@@ -117,7 +117,7 @@ Generation MSXIDs by www.generation-msx.nl
<company>Pony Canyon</company>
<year>1989</year>
<country>JP</country>
- <dump><original value="true">GoodMSX</original><megarom><type>ASCII16SRAM2</type><hash algo="sha1">5fd07ed5b7c0492d42ed91a54a0fe80ce6e4e40d</hash></megarom></dump>
+ <dump><original value="true">GoodMSX</original><megarom><type>ASCII16SRAM8</type><hash algo="sha1">5fd07ed5b7c0492d42ed91a54a0fe80ce6e4e40d</hash></megarom></dump>
</software>
<software>
<title xml:lang="en">A.E.</title>
diff --git a/src/memory/RomAscii16_2.cc b/src/memory/RomAscii16_2.cc
index 7b983c4..321f0d2 100644
--- a/src/memory/RomAscii16_2.cc
+++ b/src/memory/RomAscii16_2.cc
@@ -1,13 +1,14 @@
// ASCII 16kB based cartridges with SRAM
//
-// Examples: A-Train, Daisenryaku, Harry Fox MSX Special, Hydlide 2, Jyansei
+// Examples 2kB SRAM: Daisenryaku, Harry Fox MSX Special, Hydlide 2, Jyansei
+// Examples 8kB SRAM: A-Train
//
// this type is is almost completely a ASCII16 cartrdige
-// However, it has 2kB of SRAM (and 128 kB ROM)
+// However, it has 2 or 8kB of SRAM (and 128 kB ROM)
// Use value 0x10 to select the SRAM.
// SRAM in page 1 => read-only
// SRAM in page 2 => read-write
-// The 2Kb SRAM (0x800 bytes) are mirrored in the 16 kB block
+// The SRAM is mirrored in the 16 kB block
//
// The address to change banks (from ASCII16):
// first 16kb: 0x6000 - 0x67FF (0x6000 used)
@@ -21,10 +22,13 @@
namespace openmsx {
-RomAscii16_2::RomAscii16_2(const DeviceConfig& config, std::unique_ptr<Rom> rom)
+RomAscii16_2::RomAscii16_2(const DeviceConfig& config,
+ std::unique_ptr<Rom> rom, SubType subType)
: RomAscii16kB(config, std::move(rom))
{
- sram = make_unique<SRAM>(getName() + " SRAM", 0x0800, config);
+ unsigned size = (subType == ASCII16_8) ? 0x2000 // 8kB
+ : 0x0800; // 2kB
+ sram = make_unique<SRAM>(getName() + " SRAM", size, config);
reset(EmuTime::dummy());
}
@@ -41,7 +45,7 @@ void RomAscii16_2::reset(EmuTime::param dummy)
byte RomAscii16_2::readMem(word address, EmuTime::param time)
{
if ((1 << (address >> 14)) & sramEnabled) {
- return (*sram)[address & 0x07FF];
+ return (*sram)[address & (sram->getSize() - 1)];
} else {
return RomAscii16kB::readMem(address, time);
}
@@ -50,7 +54,7 @@ byte RomAscii16_2::readMem(word address, EmuTime::param time)
const byte* RomAscii16_2::getReadCacheLine(word address) const
{
if ((1 << (address >> 14)) & sramEnabled) {
- return &(*sram)[address & 0x07FF];
+ return &(*sram)[address & (sram->getSize() - 1)];
} else {
return RomAscii16kB::getReadCacheLine(address);
}
@@ -73,7 +77,7 @@ void RomAscii16_2::writeMem(word address, byte value, EmuTime::param /*time*/)
} else {
// write sram
if ((1 << (address >> 14)) & sramEnabled & 0x04) {
- sram->write(address & 0x07FF, value);
+ sram->write(address & (sram->getSize() - 1), value);
}
}
}
diff --git a/src/memory/RomAscii16_2.hh b/src/memory/RomAscii16_2.hh
index 4cecc0e..c95b093 100644
--- a/src/memory/RomAscii16_2.hh
+++ b/src/memory/RomAscii16_2.hh
@@ -8,7 +8,9 @@ namespace openmsx {
class RomAscii16_2 : public RomAscii16kB
{
public:
- RomAscii16_2(const DeviceConfig& config, std::unique_ptr<Rom> rom);
+ enum SubType { ASCII16_2, ASCII16_8 };
+ RomAscii16_2(const DeviceConfig& config,
+ std::unique_ptr<Rom> rom, SubType subType);
virtual ~RomAscii16_2();
virtual void reset(EmuTime::param time);
diff --git a/src/memory/RomFactory.cc b/src/memory/RomFactory.cc
index 643c217..c6fbd0f 100644
--- a/src/memory/RomFactory.cc
+++ b/src/memory/RomFactory.cc
@@ -270,7 +270,10 @@ unique_ptr<MSXDevice> create(const DeviceConfig& config)
config, move(rom), RomAscii8_8::WIZARDRY);
break;
case ROM_ASCII16_2:
- result = make_unique<RomAscii16_2>(config, move(rom));
+ result = make_unique<RomAscii16_2>(config, move(rom), RomAscii16_2::ASCII16_2);
+ break;
+ case ROM_ASCII16_8:
+ result = make_unique<RomAscii16_2>(config, move(rom), RomAscii16_2::ASCII16_8);
break;
case ROM_GAME_MASTER2:
result = make_unique<RomGameMaster2>(config, move(rom));
diff --git a/src/memory/RomInfo.cc b/src/memory/RomInfo.cc
index e2ba673..4e51b70 100644
--- a/src/memory/RomInfo.cc
+++ b/src/memory/RomInfo.cc
@@ -66,6 +66,7 @@ static void init()
init(ROM_ZEMINA90IN1, "Zemina90in1", 0x2000, "Zemina 90 in 1");
init(ROM_ZEMINA126IN1, "Zemina126in1", 0x2000, "Zemina 126 in 1");
init(ROM_ASCII16_2, "ASCII16SRAM2", 0x4000, "ASCII 16kB with 2kB SRAM");
+ init(ROM_ASCII16_8, "ASCII16SRAM8", 0x4000, "ASCII 16kB with 8kB SRAM");
init(ROM_ASCII8_8, "ASCII8SRAM8", 0x2000, "ASCII 8kB with 8kB SRAM");
init(ROM_ASCII8_2, "ASCII8SRAM2", 0x2000, "ASCII 8kB with 2kB SRAM");
init(ROM_KOEI_8, "KoeiSRAM8", 0x2000, "Koei with 8kB SRAM");
diff --git a/src/memory/RomTypes.hh b/src/memory/RomTypes.hh
index 21494c0..f2ed6e6 100644
--- a/src/memory/RomTypes.hh
+++ b/src/memory/RomTypes.hh
@@ -11,6 +11,7 @@ enum RomType {
ROM_ASCII8_8,
ROM_ASCII16,
ROM_ASCII16_2,
+ ROM_ASCII16_8,
ROM_CROSS_BLAIM,
ROM_DOOLY,
ROM_DRAM,
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openMSX (main)
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