I am trying to learn ngspice to use in my research that includes to find the power dissipation in CMOS digital circuits.
I can see the current and voltages in various branches, but I do not see any coputed power dissipation of the circuit.
Is there any way to compute power dissipation in ngspice?
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
In addition to the other fine answers I would
encourage you to look at Chapter 31 of the manual.
The @dev[param] syntax directly supports power
dissipation for resistors, capacitors, inductors,
isource, vsource, cccs, ccvs, vccs, vcvs, BJT,
VBIC, BJT2, MOS1, MOS2, MOS3, MOS6, and MOS9.
-marcel
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
To measure instantaneous current through
any element, use a voltage source as:
V<name> <node1> <node2> DC 0.0 AC 0.0
Then the instantaneous power is simply
a product of the voltage and current.
Hope that helps.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Thanks to all !!
I have used .measure command for the power dissipation. Some of the queries are as follows:
For few parameters, the power dissipation is negative. What does this means?
I am using BSIM3 model (level=8, version 3.3.0). The manual of BSIM3 (A.9,Page 150) says that the minimum channel length (defaut) is 0.0m and Lmax is 1.0m. Does that mean that I can use any channel length between 0 to 1.0m e.g 90nm, 180nm, 45nm etc?
Do I need to include any model file(technology file) for particular channel length e.g. 90nm, in my input file?
Current input file which I am running is as follows:
*CMOS Inverter Power Analysis 180nm level=8(BSIM3) Cload=200f vdd=3V
The result is inaccurate. Try this (results post-processed
with LTspice through my conversion tools):
* CMOS Inverter Power Analysis 180nm level=8(BSIM3) Cload=200f vdd=3V
.param psu = 3
vsupply vdd 0 {psu}
vgnd vss 0 0V
vin vgs vss pulse(0 {psu} 0 100p 100p 1.9n 4n)
Mp1 vdd vgs vout vdd pch l=0.18u w=20u
Mn1 vss vgs vout vss nch l=0.18u w=10u
Cload vout vss1 200f
vdc0 vss1 vss dc 0V
.MODEL nch NMOS level=8 version=3.3.0
.MODEL pch PMOS level=8 version=3.3.0
.options method=trap reltol=0.1m
.tran 10p 12n 4ns
.save all @vsupply[p]
.control
run
write inverter.raw
plot vdc0#branch
meas tran iave INTEG i(vsupply) from=4ns to=12ns
let power = -iave * 3 / 8ns ; how to access psu from here?
print power
.endc
* Measure Area Under the Curve of i(vdc0)
.measure tran idt INTEG i(vdc0) from=4ns to=12ns
* Multiply 'idt' by Vdd to get the total power idt=-4.19951e-16 (power = 12e-16 watts)
.end
-- --------------------
ngspice 14 -> source inverter.cir
Circuit: * cmos inverter power analysis 180nm level=8(bsim3) cload=200f vdd=3v
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Warning: Pd = 0 is less than W.
Warning: Ps = 0 is less than W.
Warning: Pd = 0 is less than W.
Warning: Ps = 0 is less than W.
Warning: vin: no DC value, transient time 0 value used
No. of Data Rows : 286
Measurements for Transient Analysis
idt = -1.510243940080560e-017 from = 4.000000000000000e-009 to = 1.200000000000000e-008
Can't open viewport for graphics.
iave = -1.308100788048641e-012 from = 4.000000000000000e-009 to = 1.200000000000000e-008
power = 4.905378e-004
I am trying to make a circuit of CMOS inverter using sleep transistors (Pull up ad pull down network is PMOS and NMOS transistor respectively)
Ideally the working of the circuit is:
When the sleep transistors are ON, CMOS inverter works normally
When the sleep transistors are OFF, the ouput of inverter is floating.
But, my output is incorrect
Also, when PMOS sleep transistor is OFF, the voltage of point should be VDD (PMOS passes good '1'). But, voltage of X is less than VDD.
Output voltage is also never discharged to zero (During vgs '1', output should be '0')
The code is as follows:
*MTCMOS Inverter 180nm BSIM3.3.0
.param psu = 3
vsupply vdd 0 {psu}
vgnd vss 0 0V
vin vgs vss pulse(0 {psu} 50n 100p 100p 100n 200n)
v1 vsleep vss 0V ; Input to PMOS sleep transistor
v2 vsleepbar vss 3v ; Input to NMOS sleep transistor
MP2 vx vsleep vdd vdd pch l=0.18u w=0.72u ; PMOS sleep
Mp1 vout vgs vx vdd pch l=0.18u w=0.72u ; PMOS normal
Mn1 vout vgs vy vss nch l=0.18u w=0.36u ; NMOS normal
MP2 vy vsleepbar vss vss nch l=0.18u w=0.36u ;NMOS sleep
Cload vout vss1 200f
vdc0 vss1 vss dc 0V
.MODEL nch NMOS level=8 version=3.3.0
.MODEL pch PMOS level=8 version=3.3.0
.options method=trap reltol=0.1m
.tran 10p 1000n
.save all @vsupply[p]
.control
run
write inverter.raw
plot vdc0#branch v(vgs) v(vout)
meas tran iave INTEG i(vsupply) from=0ns to=1000ns
let power = -iave * 3 / 8ns ; how to access psu from here?
print power
.endc
* Measure Area Under the Curve of i(vdc0)
.measure tran idt INTEG i(vdc0) from=0ns to=1000ns
* Multiply 'idt' by Vdd to get the total power idt=-4.19951e-16 (power = 12e-16 watts)
.END
In order to measure the static (leakage) power dissipation of cmos ciruit, I had just set the input to dc '0' or '1', and then measure it by the same method as that of measuring the total power dissipation(explained previously in this post).
Is this method of measuring the static power dissipation correct?
The pulse given is as follows:
The ngspice code for measurig the static power dissipation is:
I am trying to learn ngspice to use in my research that includes to find the power dissipation in CMOS digital circuits.
I can see the current and voltages in various branches, but I do not see any coputed power dissipation of the circuit.
Is there any way to compute power dissipation in ngspice?
In addition to the other fine answers I would
encourage you to look at Chapter 31 of the manual.
The @dev[param] syntax directly supports power
dissipation for resistors, capacitors, inductors,
isource, vsource, cccs, ccvs, vccs, vcvs, BJT,
VBIC, BJT2, MOS1, MOS2, MOS3, MOS6, and MOS9.
-marcel
To measure instantaneous current through
any element, use a voltage source as:
V<name> <node1> <node2> DC 0.0 AC 0.0
Then the instantaneous power is simply
a product of the voltage and current.
Hope that helps.
Please serch the manual for examples and usage of
the .control/.endc section
You can do thins like this there:
Regards
If I'm looking for steady state power dissipation in a circuit, I look at
the RMS current in the power supply.
--
Kind regards,
Justin Fisher.
On Sat, Mar 14, 2015 at 7:26 PM, Robert Larice rlar@users.sf.net wrote:
The average current (assuming negligible output resistance) :-)
-marcel
Thanks to all !!
I have used .measure command for the power dissipation. Some of the queries are as follows:
For few parameters, the power dissipation is negative. What does this means?
I am using BSIM3 model (level=8, version 3.3.0). The manual of BSIM3 (A.9,Page 150) says that the minimum channel length (defaut) is 0.0m and Lmax is 1.0m. Does that mean that I can use any channel length between 0 to 1.0m e.g 90nm, 180nm, 45nm etc?
Do I need to include any model file(technology file) for particular channel length e.g. 90nm, in my input file?
Current input file which I am running is as follows:
*CMOS Inverter Power Analysis 180nm level=8(BSIM3) Cload=200f vdd=3V
vsupply vdd 0 3V
vgnd vss 0 0V
vin vgs vss pulse(0 3 0 100p 100p 1.9n 4n)
Mp1 vdd vgs vout vdd pch l=0.18u w=20u
Mn1 vss vgs vout vss nch l=0.18u w=10u
Cload vout vss1 200f
vdc0 vss1 vss dc 0V
.MODEL nch NMOS level=8 version=3.3.0
.MODEL pch PMOS level=8 version=3.3.0
.tran 10p 12n
.control
run
plot vdc0#branch
.endc
*Measure Area Under the Curve of i(vdc0)
.measure tran idt INTEG i(vdc0) from=0 to=12n
*Multiply 'idt' by Vdd to get the total power idt=-4.19951e-16 (power = 12e-16 watts)
.end
Last edit: smita 2015-03-21
The result is inaccurate. Try this (results post-processed
with LTspice through my conversion tools):
Last edit: marcel hendrix 2016-08-08
Regarding the threshold voltage of MOSFET, i am getting warning message:
Warning: Model issue on line 17 : .model nch_h nmos level=8 version=3.3.0 vto=0.55v ...
unrecognized parameter (vto) - ignored
The piece of code regading the same is:
Mpsleep x vsleep vdd vdd pch_h l=0.55u w=40u ; high vth
Mp1 vout vgs x vdd pch_l l=0.65u w=20u ;low vth
Mn1 vout vgs y vss nch_l l=0.65u w=10u ;low vth
Mnsleep y vsleepbar vss vss nch_h l=0.55u w=20u ;high vth
Cload vout vss1 200f
vdc0 vss1 vss dc 0V
.MODEL nch_h NMOS level=8 version=3.3.0(VTO=0.55V)
.MODEL pch_h PMOS level=8 version=3.3.0(VTO=-0.65V)
.MODEL nch_l NMOS level=8 version=3.3.0(VTO=0.25V)
.MODEL pch_l NMOS level=8 version=3.3.0(VTO=-0.35V)
Please let me know the mistake in the syntax.
Thanks
Smita
http://www-device.eecs.berkeley.edu/bsim/Files/BSIM4/BSIM470/BSIM470_Manual.pdf
Do you really want VTH0?
--
Kind regards,
Justin Fisher.
On Sat, Apr 11, 2015 at 10:25 AM, smita smita1811@users.sf.net wrote:
For bsim3 'vto' seems to be spelled 'vth0'
I've attached something to play with.
Regards
Hello Justin,
I need to make an inverter using MTCMOS (Multi-threshold CMOS), therefore I have tried giving the low and high threshold voltages.
what is the right way to simulate multi-threshold voltage designs in ngspice ?
As Robert mentioned, VTO isn't a BSIM 4 parameter. You need VTHO.
--
Kind regards,
Justin Fisher.
Sent from my phone.
On Apr 11, 2015 1:37 PM, "smita" smita1811@users.sf.net wrote:
Yes, its running fine. Thanks all.
Hi All,
I am trying to make a circuit of CMOS inverter using sleep transistors (Pull up ad pull down network is PMOS and NMOS transistor respectively)
Ideally the working of the circuit is:
When the sleep transistors are ON, CMOS inverter works normally
When the sleep transistors are OFF, the ouput of inverter is floating.
But, my output is incorrect
Also, when PMOS sleep transistor is OFF, the voltage of point should be VDD (PMOS passes good '1'). But, voltage of X is less than VDD.
Output voltage is also never discharged to zero (During vgs '1', output should be '0')
The code is as follows:
The ouput waveform is also attached.
Please guide me regarding the same.
Last edit: smita 2015-04-14
Hello,
in your circuit the transistor "MP2" is instantiated twice.
Regards,
Thanks Robert! I am getting a beautiful waveform now :)
That was really a silly mistake on my part :(
Hello,
In order to measure the static (leakage) power dissipation of cmos ciruit, I had just set the input to dc '0' or '1', and then measure it by the same method as that of measuring the total power dissipation(explained previously in this post).
Is this method of measuring the static power dissipation correct?
The pulse given is as follows:
The ngspice code for measurig the static power dissipation is:
Note: Here static power refers to subthreshold leakage power.
Thanks
Smita
Last edit: smita 2015-05-12