From: SourceForge.net <no...@so...> - 2010-08-25 02:59:18
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Bugs item #3052637, was opened at 2010-08-24 17:47 Message generated for change (Settings changed) made by hpa You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=106208&aid=3052637&group_id=6208 Please note that this message will contain a full copy of the comment thread, including the initial issue submission, for this request, not just the latest update. Category: None Group: None >Status: Closed >Resolution: Rejected Priority: 5 Private: No Submitted By: Nobody/Anonymous (nobody) Assigned to: Nobody/Anonymous (nobody) Summary: r/m64 forms of MOV to/from Sreg generate wrong code Initial Comment: ndisasm gives: 000000AD 8ED0 mov ss,eax 000000AF 8CC8 mov eax,cs 000000B1 418EC4 mov es,r12d 000000B4 418CE9 mov r9d,gs 000000BF 488CC8 mov rax,cs 000000C2 498CE9 mov r9,gs input was: mov ss, rax mov rax, cs mov es, r12 mov r9, gs db 0x48, 0x8c, 0xc8 db 0x49, 0x8c, 0xe9 I'm afraif MOV reg64,reg_sreg \323\1\x8C\101 X64,OPT,ND MOV reg_sreg,reg64 \323\1\x8C\110 X64,OPT,ND have to be declared as MOV reg64,reg_sreg \324\1\x8C\101 X64,OPT,ND MOV reg_sreg,reg64 \324\1\x8C\110 X64,OPT,ND to get the correct REX prefixes. ---------------------------------------------------------------------- >Comment By: H. Peter Anvin (hpa) Date: 2010-08-24 19:59 Message: OPT patterns are optimizations... those instruction patterns have the exact same hardware effect. So this is not a bug. ---------------------------------------------------------------------- You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=106208&aid=3052637&group_id=6208 |