Re: [myhdl-list] Problems inferring RAM when it is buried in system

[Jan D. <ja...@ja...>]

George Pantazopoulos wrote:
> Hi Jan,
> 
>    Your trivial example of mapping a list of signals to a RAM memory 
> successfully infers a Distributed RAM under myHDL 0.5a1 and Xilinx ISE 
> 7.1.04i:
> 
> def RAM(dout, din, addr, we, clk, depth=128):
>    """  Ram model """
>       mem = [Signal(intbv(0)[8:]) for i in range(depth)]
> 
>    @always(clk.posedge)
>    def write():
>        if we:
>            mem[int(addr)].next = din
>                   @always_comb
>    def read():
>        dout.next = mem[int(addr)]
>           return write, read
> 
> 
> However, Xilinx ISE fails to infer a Distributed RAM if the ram logic is 
> buried in the system (input/output ports not exposed at top level).

Hi:

I have installed Xilinx Webpack for Linux and done some experiments. In
contrast to what you see, I have been able to infer distributed RAM for
embedded code.

Details:

I have used the MyHDL code above, as well as a wrapped version
in which every RAM interface signal comes from/goes to a register
(except the clock). So for the wrapped version, all RAM interface
signals except for the clock are internal.

For the default device choice, I noticed that only flip-flops
were inferred. I assume that the simpler devices don't contain
RAM. To be sure, I chose a Virtex 4 device for my experiments.

Initially the RAM inference style was set to "auto".

For the non-wrapped version, I get an info that it cannot use block
RAM, but then it uses distributed RAM correctly (and automatically).

For the wrapped version, it tries to use a block RAM, but then
XST fails with an internal error. However, when I then set
the RAM inference style to "distributed", a distributed RAM
gets properly inferred.

I think this shows that the issue you see is not necessarily
related to the "embedded" nature of the code, but may well be
related to other issues. Also, it seems there's nothing
conceptually wrong with the approach, but we need good
synthesis tools of course.

Jan

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