[Madwifi-users] Re: [Madwifi-devel] Re: Hi, Everyone. I find a interesting issue about "HAL status 3" error, " ath0: hardware error; reseting "error and "-DAH_BYTE_ORDER=AH_BIG_ENDIAN" option.

[Mark R. <mr...@ma...>]

be aware that the patches Steffen and I were discussing were specific
to ixp42x-xscale target (which needs readl/writel to access pci space).
the patch also swaps which address range is 'bswapped' because both the
xscale hardware and the atheros hardware was doing the le-to-be swap in
hardware, thus making the data little-endian again.

hope this helps.
-mark

On Jan 28, 2005, at 8:51 PM, Liu Pengwu wrote:
> Yes, it's AH_BIG_ENDIAN issue. If building HAL without
> -DAH_BYTE_ORDER=3DAH_BIG_ENDIAN option, its default is =
AH_LITTLE_ENDIAN.
>
> Now, I build driver with -DAH_BYTE_ORDER=3DAH_BIG_ENDIAN option, when =
I
> insmod  ath_pci.o, system complains:
>       ath%d: "unable to attach hardware; HAL status 3
>       ath_pci: No devices found, driver not installed.
> I track it, and find the iffy fuction maybe is
>      static void
>      ar5212SetPowerModeSleep(struct ath_hal *ah, int setChip)
>      {
>       OS_REG_WRITE(ah, AR_STA_ID1,OS_REG_READ(ah, AR_STA_ID1) |
> AR_STA_ID1_PWR_SAV);
>       if (setChip)
>       OS_REG_WRITE(ah, AR_SCR, SM(AR_SCR_SLE_SLP, AR_SCR_SLE));
>       }
>
>
> I have finded that Steffen has shared his patch, I want to try it, but
> "readl" and "writel" are "unsolved symbol". I have change #include
> <asm/io.h>  to #include <asm-mips/io.h> , however, they are "unsolved
> symbol" still. why? I am a linux newbie, how to do? thanks.
>
> Liu pengwu
>
>  --- hal/linux/ah_osdep.c    2004-10-20 20:24:33.000000000 +0200
>  +++ hal/linux/ah_osdep.c    2004-12-07 16:53:51.000000000 +0100
>  @@ -323,11 +324,16 @@
>   void __ahdecl
>   ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val)
>   {
>  -#ifdef AH_DEBUG
>  -    if (ath_hal_debug > 1)
>  -        ath_hal_printf(ah, "WRITE 0x%x <=3D 0x%x\n", reg, val);
>  -#endif
>  -    _OS_REG_WRITE(ah, reg, val);
>  +
>  +        if ( (reg) >=3D 0x4000 && (reg) < 0x5000)
>  +    {
>  +                writel(((val)),(volatile u_int32_t *)((ah)->ah_sh +=20=

> (reg)));
>  +    }
>  +        else
>  +    {
>  +                writel(__bswap32(val),(volatile u_int32_t
> *)((ah)->ah_sh + (reg)));
>  +    }
>   }
>   EXPORT_SYMBOL(ath_hal_reg_write);
>
>  @@ -336,11 +342,14 @@
>   {
>        u_int32_t val;
>
>  -    val =3D _OS_REG_READ(ah, reg);
>  -#ifdef AH_DEBUG
>  -    if (ath_hal_debug > 1)
>  -        ath_hal_printf(ah, "READ 0x%x =3D> 0x%x\n", reg, val);
>  -#endif
>  +        if ((reg) >=3D 0x4000 && (reg) < 0x5000) {
>  +                 val =3D(readl((volatile u_int32_t *)((ah)->ah_sh +=20=

> (reg))));
>  +    }
>  +    else
>  +    {
>  +                 val =3D  __bswap32(readl((volatile u_int32_t
> *)((ah)->ah_sh + (reg))));
>  +    }
>       return val;
>   }
>   EXPORT_SYMBOL(ath_hal_reg_read);
>
> AND
>
>  --- hal/linux/ah_osdep.c    2004-10-20 20:24:33.000000000 +0200
>  +++ hal/linux/ah_osdep.c    2004-12-07 16:53:51.000000000 +0100
>  @@ -323,11 +324,16 @@
>   void __ahdecl
>   ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val)
>   {
>  -#ifdef AH_DEBUG
>  -    if (ath_hal_debug > 1)
>  -        ath_hal_printf(ah, "WRITE 0x%x <=3D 0x%x\n", reg, val);
>  -#endif
>  -    _OS_REG_WRITE(ah, reg, val);
>  +
>  +        if ( (reg) >=3D 0x4000 && (reg) < 0x5000)
>  +    {
>  +                writel(((val)),(volatile u_int32_t *)((ah)->ah_sh +=20=

> (reg)));
>  +    }
>  +        else
>  +    {
>  +                writel(__bswap32(val),(volatile u_int32_t
> *)((ah)->ah_sh + (reg)));
>  +    }
>   }
>   EXPORT_SYMBOL(ath_hal_reg_write);
>
>  @@ -336,11 +342,14 @@
>   {
>        u_int32_t val;
>
>  -    val =3D _OS_REG_READ(ah, reg);
>  -#ifdef AH_DEBUG
>  -    if (ath_hal_debug > 1)
>  -        ath_hal_printf(ah, "READ 0x%x =3D> 0x%x\n", reg, val);
>  -#endif
>  +        if ((reg) >=3D 0x4000 && (reg) < 0x5000) {
>  +                 val =3D(readl((volatile u_int32_t *)((ah)->ah_sh +=20=

> (reg))));
>  +    }
>  +    else
>  +    {
>  +                 val =3D  __bswap32(readl((volatile u_int32_t
> *)((ah)->ah_sh + (reg))));
>  +    }
>       return val;
>   }
>   EXPORT_SYMBOL(ath_hal_reg_read);
>
>
>
>
> On Fri, 28 Jan 2005 16:03:55 +0800, Liu Pengwu <lp...@gm...>=20
> wrote:
>
>> wlan: 0.8.4.2 (EXPERIMENTAL)
>> ath_hal: 0.9.14.4 (AR5210, AR5211, AR5212, RF5111, RF5112, RF2413)
>> ath_rate_amrr: 0.1
>> ath_pci: 0.9.4.5 (EXPERIMENTAL)
>> My kernel is 2.4.20, patched with iw240_we15-6.diff, wireless tools
>> is  wireless_tools.26 and CPU is mips1-be-elf.
>>
>> When I build my ath_hal.o and hal bin code
>> with"-DAH_BYTE_ORDER=3DAH_BIG_ENDIAN"  option, I can not insmod
>> ath_pci.o, and system complains " ath%d: "unable to attach hardware;
>> HAL status 3".
>>
>> If I build my my ath_hal.o and hal bin code
>> without"-DAH_BYTE_ORDER=3DAH_BIG_ENDIAN"  option, all four .o files =
can
>> be installed, and looks good. But when ifconfig ath0 up, system =
report
>> "ath0: hardware error; reseting" over and over.
>>
>> anyboday may explain this?
>>
>> thanks ,
>>
>> =E5=88=98=E9=B9=8F=E5=8D=88=E3=80=82