From: Brad M. <bmi...@gm...> - 2010-11-26 17:41:45
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Guys, That is good news it's a csr. It's a version with no flash so sco over hci needs to be set on each boot, probably resetting the chip as well. The first barrier to doing audio is the hciattach is running at 115k. We can't squeeze headset or a2dp audio over that connection. I tried changing this but it looks like it needs to be combined with another bccmd setting + reset at boot time. I'm experimenting with this now. Brad > actually executing hciconfig hci0 revision gives us: > hci0: Type: BR/EDR Bus: UART > BD Address: XX:XX:XX:XX:XX:XX ACL MTU: 310:10 SCO MTU: 64:8 > Unified 21e > Chip version: BlueCore4-ROM > Max key size: 128 bit > SCO mapping: PCM -- Brad Midgley |