[Emc-commit] emc2/src/hal/components freqgen.c,1.26,1.27

[EMC C. s. <cv...@cv...>]

Modified file emc2/src/hal/components/freqgen.c

Full file:
<http://cvs.linuxcnc.org/cvs/emc2/src/hal/components/freqgen.c?rev=1.27>

Difference:
<http://cvs.linuxcnc.org/cvs/emc2/src/hal/components/freqgen.c.diff?r1=1.26;r2=1.27>

Branch: HEAD

Log:
revision 1.27
date: 2006/11/26 18:08:46;  author: jepler;  state: Exp;  lines: +4 -4
fix typo in comment

--- freqgen.c	2006/11/18 03:04:58	1.26
+++ freqgen.c	2006/11/26 18:08:46	1.27
@@ -9,9 +9,9 @@
 * Copyright (c) 2003 All rights reserved.
 *
 * Last change: 
-# $Revision: 1.26 $
-* $Author: jmkasunich $
-* $Date: 2006/11/18 03:04:58 $
+# $Revision: 1.27 $
+* $Author: jepler $
+* $Date: 2006/11/26 18:08:46 $
 ********************************************************************/
 /** This file, 'freqgen.c', is a HAL component that generates step
     pulses at a specific frequency in software.  The maximum step
@@ -511,7 +511,7 @@
     to frequency to an accumulator.  When the accumulator overflows (or
     underflows), it is time to generate an up (or down) output pulse.
     The add value is limited to +/-2^30, and overflows are detected
-    at bit 30, not bit 31.  This means that with add_val at it's max
+    at bit 30, not bit 31.  This means that with add_val at its max
     (or min) value, and overflow (or underflow) occurs on every cycle.
     NOTE:  step/dir outputs cannot generate a step every cycle.  The
     maximum steprate is determined by the timing parameters.  The