Radeon Read/Write domains & TTM priority

[Jerome G. <gl...@fr...>]

I am working on improving 2D performances in KMS world and
i am starting to think that we don't need the split btw
read/write domain but only need one domain. My thinking is
that there is no way for the kernel to properly synchronize
data if memory read or write domain differ (for instance
CPU read and GPU write) i think synchronizing btw CPU & GPU
should be the matter of some other interface like the
is_idle interface. So i want to change setdomain interface
to only take 1 domain (doing same to all ioctl to request
only 1 domain). So with this change if the userspace wants
to access one buffer object to work on it, it should do
the following :

setdomain(bo, CPU)
wait_idle(bo)

It would be up to the set domain to issue proper GPU flush
if necessary, and wait idle should return only once flushing
is done.

Am i forgetting somethings about the motivations btw
separate read/write domain ?


Corollary the TTM priority stuff is i believe a wrong idea
for radeon (could be usefull for others GPU but i don't have
such feeling). So i would like to be able to disable it and
move the knowledge in radeon kernel driver, here is my thinking
on that :

domain provided by userspace is a tip given to the kernel
Then the kernel driver will be the one to choose where to
put the buffer. For instance userspace can create an object
in GTT space because this object will routinely accessed
by the CPU, but at one point the GPU might need to write to
it and most of the time we really want to put all buffer
the GPU write to into VRAM. So kernel could move the object
to VRAM for doing the rendering.

Any thoughts on that ?

I am working on patch to exercise this, i am especialy
interested in performances improvement we can have in
application which routinely call getimage for rendering,
such as firefox.

Cheers,
Jerome