[cedet-semantic] Detecting CPU stalls with semantic
Brought to you by:
zappo
From: <myr...@us...> - 2004-01-22 20:54:58
|
Hi, I'm working on a mode to edit vector processing unit (vpu) code in emacs and was asked for stall detection. Aparently this exist in some tool for pro ps2 developers. The VPU has 2 parallel execution units so each line (cycle) has 2 instructions, one called "upper" and the next "lower" and would typically look like this: MULq.xyz VF14, VF14, Q MR32.xy VF08, VF08 Here, "MULq" is the upper instruction, and "MR32" is the lower. (But this is not really important). Now, since MUL has throughput/latency of 1/4, I can use MUL instruction in the next line (cycle) ((latency 1)), but I can't read the VF14 register until 4 lines later ((throughput 4)) or the cpu will stall (and hence do nothing I could use it for in the meantime); like so: MAX.xyw VF27, VF27, VF14 MR32.x VF02, VF01 To confuse the issue, not all instructions have the same throughput/latency nor do they always use the same execution unit. The DIV (lower instruction) for example is 7/7 so I can't use a DIV, SQRT or RSQRT instructions for 7 lines (without stalls), but I can use other lower instructions during this time. So, can semantic provide me with some information to detect stalls, or do I have to code some Real Magic(tm) to do this? How to actually display the stall info is a different story. Johann -- This line is left blank intentionally. |