From: Kevin P L. <kev...@us...> - 2002-09-17 22:50:56
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Update of /cvsroot/bochs/bochs/fpu In directory usw-pr-cvs1:/tmp/cvs-serv31932/fpu Modified Files: fpu.cc wmFPUemu_glue.cc Log Message: Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction. Index: fpu.cc =================================================================== RCS file: /cvsroot/bochs/bochs/fpu/fpu.cc,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- fpu.cc 30 May 2001 18:56:01 -0000 1.5 +++ fpu.cc 17 Sep 2002 22:50:53 -0000 1.6 @@ -39,7 +39,7 @@ void -BX_CPU_C::ESC0(BxInstruction_t *i) +BX_CPU_C::ESC0(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -52,7 +52,7 @@ } void -BX_CPU_C::ESC1(BxInstruction_t *i) +BX_CPU_C::ESC1(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -65,7 +65,7 @@ } void -BX_CPU_C::ESC2(BxInstruction_t *i) +BX_CPU_C::ESC2(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -78,7 +78,7 @@ } void -BX_CPU_C::ESC3(BxInstruction_t *i) +BX_CPU_C::ESC3(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -95,7 +95,7 @@ } void -BX_CPU_C::ESC4(BxInstruction_t *i) +BX_CPU_C::ESC4(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -108,7 +108,7 @@ } void -BX_CPU_C::ESC5(BxInstruction_t *i) +BX_CPU_C::ESC5(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -121,7 +121,7 @@ } void -BX_CPU_C::ESC6(BxInstruction_t *i) +BX_CPU_C::ESC6(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -134,7 +134,7 @@ } void -BX_CPU_C::ESC7(BxInstruction_t *i) +BX_CPU_C::ESC7(bxInstruction_c *i) { if ( BX_CPU_THIS_PTR cr0.em || BX_CPU_THIS_PTR cr0.ts ) { exception(BX_NM_EXCEPTION, 0, 0); @@ -147,7 +147,7 @@ } void -BX_CPU_C::FWAIT(BxInstruction_t *i) +BX_CPU_C::FWAIT(bxInstruction_c *i) { #if BX_CPU_LEVEL < 3 // WAIT doesn't generate single steps on 8086. Index: wmFPUemu_glue.cc =================================================================== RCS file: /cvsroot/bochs/bochs/fpu/wmFPUemu_glue.cc,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- wmFPUemu_glue.cc 9 Sep 2002 16:11:25 -0000 1.10 +++ wmFPUemu_glue.cc 17 Sep 2002 22:50:53 -0000 1.11 @@ -42,7 +42,7 @@ // Use this to hold a pointer to the instruction since // we can't pass this to the FPU emulation routines, which // will ultimately call routines here. -static BxInstruction_t *fpu_iptr = NULL; +static bxInstruction_c *fpu_iptr = NULL; static BX_CPU_C *fpu_cpu_ptr = NULL; i387_t *current_i387; @@ -67,7 +67,7 @@ } void -BX_CPU_C::fpu_execute(BxInstruction_t *i) +BX_CPU_C::fpu_execute(bxInstruction_c *i) { fpu_addr_modes addr_modes; void *data_address; @@ -126,7 +126,7 @@ data_sel_off.offset = i->rm_addr; data_sel_off.selector = BX_CPU_THIS_PTR sregs[i->seg].selector.value; - math_emulate2(addr_modes, i->modrm, i->b1, data_address, + math_emulate2(addr_modes, i->modrm(), i->b1, data_address, data_sel_off, entry_sel_off); } |