[Bochs-cvs] SF.net SVN: bochs:[10223] trunk/bochs/cpu

[<ssh...@us...>]

Revision: 10223
          http://bochs.svn.sourceforge.net/bochs/?rev=10223&view=rev
Author:   sshwarts
Date:     2011-02-26 20:43:11 +0000 (Sat, 26 Feb 2011)

Log Message:
-----------
Fixed decoding of CRC32 instr

Modified Paths:
--------------
    trunk/bochs/cpu/cpu.cc
    trunk/bochs/cpu/cpu.h
    trunk/bochs/cpu/crregs.cc
    trunk/bochs/cpu/fetchdecode64.cc

Modified: trunk/bochs/cpu/cpu.cc
===================================================================
--- trunk/bochs/cpu/cpu.cc	2011-02-26 20:33:58 UTC (rev 10222)
+++ trunk/bochs/cpu/cpu.cc	2011-02-26 20:43:11 UTC (rev 10223)
@@ -610,24 +610,6 @@
   //   Code page fault (priority 7 on 486/Pentium)
   // (handled in main decode loop)
 
-  // Priority 7: Faults from decoding next instruction
-  //   Instruction length > 15 bytes
-  //   Illegal opcode
-  //   Coprocessor not available
-  // (handled in main decode loop etc)
-
-  // Priority 8: Faults on executing an instruction
-  //   Floating point execution
-  //   Overflow
-  //   Bound error
-  //   Invalid TSS
-  //   Segment not present
-  //   Stack fault
-  //   General protection
-  //   Data page fault
-  //   Alignment check
-  // (handled by rest of the code)
-
   // Now we can handle things which are synchronous to instruction
   // execution.
   if (BX_CPU_THIS_PTR get_RF()) {
@@ -638,16 +620,7 @@
     // only bother comparing if any breakpoints enabled and
     // debug events are not inhibited on this boundary.
     if (! (BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_DEBUG_SHADOW) && ! BX_CPU_THIS_PTR in_repeat) {
-      if (BX_CPU_THIS_PTR dr7 & 0x000000ff) {
-        bx_address iaddr = get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip);
-        Bit32u dr6_bits = hwdebug_compare(iaddr, 1, BX_HWDebugInstruction, BX_HWDebugInstruction);
-        if (dr6_bits) {
-          // Add to the list of debug events thus far.
-          BX_CPU_THIS_PTR debug_trap |= dr6_bits;
-          BX_ERROR(("#DB: x86 code breakpoint catched"));
-          exception(BX_DB_EXCEPTION, 0); // no error, not interrupt
-        }
-      }
+      code_breakpoint_match(get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip));
     }
   }
 #endif
@@ -660,6 +633,24 @@
     BX_CPU_THIS_PTR debug_trap |= BX_DEBUG_SINGLE_STEP_BIT;
   }
 
+  // Priority 7: Faults from decoding next instruction
+  //   Instruction length > 15 bytes
+  //   Illegal opcode
+  //   Coprocessor not available
+  // (handled in main decode loop etc)
+
+  // Priority 8: Faults on executing an instruction
+  //   Floating point execution
+  //   Overflow
+  //   Bound error
+  //   Invalid TSS
+  //   Segment not present
+  //   Stack fault
+  //   General protection
+  //   Data page fault
+  //   Alignment check
+  // (handled by rest of the code)
+
   if (!((BX_CPU_INTR && BX_CPU_THIS_PTR get_IF()) ||
         BX_CPU_THIS_PTR debug_trap ||
 //      BX_CPU_THIS_PTR get_TF() // implies debug_trap is set

Modified: trunk/bochs/cpu/cpu.h
===================================================================
--- trunk/bochs/cpu/cpu.h	2011-02-26 20:33:58 UTC (rev 10222)
+++ trunk/bochs/cpu/cpu.h	2011-02-26 20:43:11 UTC (rev 10223)
@@ -3267,6 +3267,7 @@
   // x86 hardware debug support
   BX_SMF bx_bool hwbreakpoint_check(bx_address laddr);
   BX_SMF void    iobreakpoint_match(unsigned port, unsigned len);
+  BX_SMF void    code_breakpoint_match(bx_address laddr);
   BX_SMF void    hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw);
   BX_SMF Bit32u  hwdebug_compare(bx_address laddr, unsigned len,
                                  unsigned opa, unsigned opb);

Modified: trunk/bochs/cpu/crregs.cc
===================================================================
--- trunk/bochs/cpu/crregs.cc	2011-02-26 20:33:58 UTC (rev 10222)
+++ trunk/bochs/cpu/crregs.cc	2011-02-26 20:43:11 UTC (rev 10223)
@@ -1192,6 +1192,19 @@
   return 0;
 }
 
+void BX_CPU_C::code_breakpoint_match(bx_address laddr)
+{
+  if (BX_CPU_THIS_PTR dr7 & 0x000000ff) {
+    Bit32u dr6_bits = hwdebug_compare(iaddr, 1, BX_HWDebugInstruction, BX_HWDebugInstruction);
+    if (dr6_bits) {
+      // Add to the list of debug events thus far.
+      BX_CPU_THIS_PTR debug_trap |= dr6_bits;
+      BX_ERROR(("#DB: x86 code breakpoint catched"));
+      exception(BX_DB_EXCEPTION, 0); // no error, not interrupt
+    }
+  }
+}
+
 void BX_CPU_C::hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw)
 {
   if (BX_CPU_THIS_PTR dr7 & 0x000000ff) {

Modified: trunk/bochs/cpu/fetchdecode64.cc
===================================================================
--- trunk/bochs/cpu/fetchdecode64.cc	2011-02-26 20:33:58 UTC (rev 10222)
+++ trunk/bochs/cpu/fetchdecode64.cc	2011-02-26 20:43:11 UTC (rev 10223)
@@ -2012,7 +2012,7 @@
           OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[b3]);
           break;
         case BxOSizeGrp:
-          OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[offset >> 8]);
+          OpcodeInfoPtr = &(OpcodeInfoPtr->AnotherArray[offset >> 9]);
           break;
         case BxPrefixSSE:
           /* For SSE opcodes look into another table


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