[Bochs-cvs] CVS: bochs/cpu fetchdecode.cc, 1.239, 1.240 fetchdecode64.cc, 1.241, 1.242 instr.h, 1.24, 1.25

[Stanislav S. <ssh...@us...>]

Update of /cvsroot/bochs/bochs/cpu
In directory sfp-cvsdas-2.v30.ch3.sourceforge.com:/tmp/cvs-serv7692/cpu

Modified Files:
	fetchdecode.cc fetchdecode64.cc instr.h 
Log Message:
added ia_opcode into bxInstruction class


Index: fetchdecode.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/fetchdecode.cc,v
retrieving revision 1.239
retrieving revision 1.240
diff -u -d -r1.239 -r1.240
--- fetchdecode.cc	21 Dec 2009 13:38:06 -0000	1.239
+++ fetchdecode.cc	9 Jan 2010 15:11:31 -0000	1.240
@@ -184,15 +184,6 @@
 };
 #undef  bx_define_opcode
 
-#if BX_INSTRUMENT_IA_OPCODE
-const char* BxOpcodeNamesTable[BX_IA_LAST] =
-{
-#define bx_define_opcode(a, b, c) #a,
-#include "ia_opcodes.h"
-};
-#undef  bx_define_opcode
-#endif
-
 /* ************************** */
 /* 512 entries for 16bit mode */
 /* 512 entries for 32bit mode */
@@ -2957,10 +2948,7 @@
 
   i->setB1(b1);
   i->setILen(ilen);
-
-#if BX_INSTRUMENT_IA_OPCODE
-  i->ia_opcode = ia_opcode;
-#endif
+  i->setIaOpcode(ia_opcode);
 
 #if BX_SUPPORT_TRACE_CACHE
   if ((attr & BxTraceEnd) || ia_opcode == BX_IA_ERROR)
@@ -2982,3 +2970,15 @@
 
   exception(BX_UD_EXCEPTION, 0, 0);
 }
+
+const char *get_bx_opcode_name(Bit16u ia_opcode)
+{
+  static const char* BxOpcodeNamesTable[BX_IA_LAST] =
+  {
+#define bx_define_opcode(a, b, c) #a,
+#include "ia_opcodes.h"
+  };
+#undef  bx_define_opcode
+
+  return (ia_opcode < BX_IA_LAST) ? BxOpcodeNamesTable[ia_opcode] : 0;
+}

Index: fetchdecode64.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/fetchdecode64.cc,v
retrieving revision 1.241
retrieving revision 1.242
diff -u -d -r1.241 -r1.242
--- fetchdecode64.cc	21 Dec 2009 13:38:06 -0000	1.241
+++ fetchdecode64.cc	9 Jan 2010 15:11:32 -0000	1.242
@@ -3852,10 +3852,7 @@
 
   i->setB1(b1);
   i->setILen(ilen);
-
-#if BX_INSTRUMENT_IA_OPCODE
-  i->ia_opcode = ia_opcode;
-#endif
+  i->setIaOpcode(ia_opcode);
 
 #if BX_SUPPORT_TRACE_CACHE
   if ((attr & BxTraceEnd) || ia_opcode == BX_IA_ERROR)

Index: instr.h
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/instr.h,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -d -r1.24 -r1.25
--- instr.h	21 Dec 2009 13:38:06 -0000	1.24
+++ instr.h	9 Jan 2010 15:11:32 -0000	1.25
@@ -24,10 +24,6 @@
 #ifndef BX_INSTR_H
 #define BX_INSTR_H
 
-#ifndef BX_INSTRUMENT_IA_OPCODE
-  #define BX_INSTRUMENT_IA_OPCODE 0
-#endif
-
 class bxInstruction_c;
 
 // <TAG-TYPE-EXECUTEPTR-START>
@@ -50,16 +46,10 @@
   BxExecutePtr_tR execute;
   BxExecutePtr_tR execute2;
   BxResolvePtr_tR ResolveModrm;
-#if BX_INSTRUMENT_IA_OPCODE
-  Bit16u ia_opcode;
-#endif
 
   struct {
-    //  7...0 (unused)
-    Bit8u metaInfo4;
-
-    //  7...0 b1 - opcode byte
-    Bit8u metaInfo3;
+    //  15..0 opcode
+    Bit16u ia_opcode;
 
     //  7...4 (unused)
     //  3...0 ilen (0..15)
@@ -76,7 +66,7 @@
   } metaInfo;
 
 #define BX_INSTR_METADATA_SEG   0
-#define BX_INSTR_METADATA_DEST  1
+#define BX_INSTR_METADATA_B1    1
 #define BX_INSTR_METADATA_NNN   2
 #define BX_INSTR_METADATA_RM    3
 #define BX_INSTR_METADATA_BASE  4
@@ -121,16 +111,18 @@
 #endif
   };
 
-  BX_CPP_INLINE unsigned modC0() const
-  {
-    // This is a cheaper way to test for modRM instructions where
-    // the mod field is 0xc0.  FetchDecode flags this condition since
-    // it is quite common to be tested for.
-    return metaInfo.metaInfo1 & (1<<2);
+  BX_CPP_INLINE unsigned seg(void) const {
+    return metaData[BX_INSTR_METADATA_SEG];
   }
-  BX_CPP_INLINE unsigned assertModC0()
-  {
-    return metaInfo.metaInfo1 |= (1<<2);
+  BX_CPP_INLINE void setSeg(unsigned val) {
+    metaData[BX_INSTR_METADATA_SEG] = val;
+  }
+
+  BX_CPP_INLINE unsigned b1(void) const {
+    return metaData[BX_INSTR_METADATA_B1];
+  }
+  BX_CPP_INLINE void setB1(unsigned b1) {
+    metaData[BX_INSTR_METADATA_B1] = b1 & 0xff;
   }
   BX_CPP_INLINE void setOpcodeReg(unsigned opreg) {
     // The opcodeReg form (low 3 bits of the opcode byte (extended
@@ -195,13 +187,6 @@
   BX_CPP_INLINE void init(unsigned os32, unsigned as32, unsigned os64, unsigned as64)
   {
     metaInfo.metaInfo1 = (os32<<3) | (as32<<4) | (os64<<5) | (as64<<6);
-    metaInfo.metaInfo4 = 0;
-  }
-  BX_CPP_INLINE unsigned seg(void) const {
-    return metaData[BX_INSTR_METADATA_SEG];
-  }
-  BX_CPP_INLINE void setSeg(unsigned val) {
-    metaData[BX_INSTR_METADATA_SEG] = val;
   }
 
   BX_CPP_INLINE unsigned os32L(void) const {
@@ -259,6 +244,13 @@
     metaInfo.metaInfo2 = ilen;
   }
 
+  BX_CPP_INLINE unsigned getIaOpcode(void) const {
+    return metaInfo.ia_opcode;
+  }
+  BX_CPP_INLINE void setIaOpcode(Bit16u op) {
+    metaInfo.ia_opcode = op;
+  }
+
   BX_CPP_INLINE unsigned repUsedL(void) const {
     return metaInfo.metaInfo1 & 3;
   }
@@ -269,18 +261,21 @@
     metaInfo.metaInfo1 = (metaInfo.metaInfo1 & ~3) | (value);
   }
 
-  BX_CPP_INLINE unsigned b1(void) const {
-    return metaInfo.metaInfo3;
+  BX_CPP_INLINE unsigned modC0() const
+  {
+    // This is a cheaper way to test for modRM instructions where
+    // the mod field is 0xc0.  FetchDecode flags this condition since
+    // it is quite common to be tested for.
+    return metaInfo.metaInfo1 & (1<<2);
   }
-  BX_CPP_INLINE void setB1(unsigned b1) {
-    metaInfo.metaInfo3 = b1 & 0xff;
+  BX_CPP_INLINE unsigned assertModC0()
+  {
+    return metaInfo.metaInfo1 |= (1<<2);
   }
 };
 // <TAG-CLASS-INSTRUCTION-END>
 
-#if BX_INSTRUMENT_IA_OPCODE
-extern const char* BxOpcodeNamesTable[];
-#endif
+const char *get_bx_opcode_name(Bit16u ia_opcode);
 
 enum {
 #define bx_define_opcode(a, b, c) a,