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[Bochs-cvs] CVS: bochs/cpu fetchdecode.cc,1.47,1.48 fetchdecode64.cc,1.45,1.46 i387.h,1.11,1.12 mmx.cc,1.32,1.33 sse_move.cc,1.18,1.19
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From: Stanislav S. <ssh...@us...> - 2003-04-16 18:38:57
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Update of /cvsroot/bochs/bochs/cpu
In directory sc8-pr-cvs1:/tmp/cvs-serv1132/cpu
Modified Files:
fetchdecode.cc fetchdecode64.cc i387.h mmx.cc sse_move.cc
Log Message:
Little style changes
Elliminated i387_t alimit field (not used in FPU)
Index: fetchdecode.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/fetchdecode.cc,v
retrieving revision 1.47
retrieving revision 1.48
diff -u -d -r1.47 -r1.48
--- fetchdecode.cc 6 Apr 2003 19:08:24 -0000 1.47
+++ fetchdecode.cc 16 Apr 2003 18:38:50 -0000 1.48
@@ -1713,8 +1713,8 @@
/* 0F 7B */ { 0, &BX_CPU_C::BxError },
/* 0F 7C */ { 0, &BX_CPU_C::BxError },
/* 0F 7D */ { 0, &BX_CPU_C::BxError },
- /* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
- /* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
+ /* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
+ /* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
/* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
/* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
/* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
@@ -2040,7 +2040,7 @@
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Eb },
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Ed },
/* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear32_Iw },
- /* C3 */ { 0, &BX_CPU_C::RETnear32 },
+ /* C3 */ { 0, &BX_CPU_C::RETnear32 },
/* C4 */ { BxAnother, &BX_CPU_C::LES_GvMp },
/* C5 */ { BxAnother, &BX_CPU_C::LDS_GvMp },
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
@@ -2236,8 +2236,8 @@
/* 0F 7B */ { 0, &BX_CPU_C::BxError },
/* 0F 7C */ { 0, &BX_CPU_C::BxError },
/* 0F 7D */ { 0, &BX_CPU_C::BxError },
- /* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
- /* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
+ /* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
+ /* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
Index: fetchdecode64.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/fetchdecode64.cc,v
retrieving revision 1.45
retrieving revision 1.46
diff -u -d -r1.45 -r1.46
--- fetchdecode64.cc 9 Apr 2003 19:20:05 -0000 1.45
+++ fetchdecode64.cc 16 Apr 2003 18:38:50 -0000 1.46
@@ -2645,7 +2645,7 @@
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eq },
/* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear64_Iw },
- /* C3 */ { 0, &BX_CPU_C::RETnear64 },
+ /* C3 */ { 0, &BX_CPU_C::RETnear64 },
/* C4 */ { 0, &BX_CPU_C::BxError },
/* C5 */ { 0, &BX_CPU_C::BxError },
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
Index: i387.h
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/i387.h,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- i387.h 12 Apr 2003 21:02:05 -0000 1.11
+++ i387.h 16 Apr 2003 18:38:51 -0000 1.12
@@ -14,12 +14,12 @@
Bit32s fcs;
Bit32s foo;
Bit32s fos;
- Bit32s aligment;
+ Bit32s align32;
Bit64u st_space[16]; // 8*16 bytes per FP-reg (aligned) = 128 bytes
unsigned char tos;
unsigned char no_update;
unsigned char rm;
- unsigned char alimit;
+ unsigned align8;
};
// Endian Host byte order Guest (x86) byte order
@@ -29,11 +29,11 @@
//
// Legend: F - fraction/mmx
// E - exponent
-// A - aligment
+// A - alignment
#ifdef BX_BIG_ENDIAN
struct BxFpuRegister {
- Bit16u aligment1, aligment2, aligment3;
+ Bit16u alignment1, alignment2, alignment3;
Bit16s exp; /* Signed quantity used in internal arithmetic. */
Bit32u sigh;
Bit32u sigl;
@@ -43,7 +43,7 @@
Bit32u sigl;
Bit32u sigh;
Bit16s exp; /* Signed quantity used in internal arithmetic. */
- Bit16u aligment1, aligment2, aligment3;
+ Bit16u alignment1, alignment2, alignment3;
} GCC_ATTRIBUTE((aligned(16), packed));
#endif
@@ -148,11 +148,11 @@
//
// Legend: F - fraction/mmx
// E - exponent
-// A - aligment
+// A - alignment
#ifdef BX_BIG_ENDIAN
struct bx_mmx_reg_t {
- Bit16u aligment1, aligment2, aligment3;
+ Bit16u alignment1, alignment2, alignment3;
Bit16u exp; /* 2 byte FP-reg exponent */
BxPackedMmxRegister packed_mmx_register;
} GCC_ATTRIBUTE((aligned(16), packed));
@@ -160,7 +160,7 @@
struct bx_mmx_reg_t {
BxPackedMmxRegister packed_mmx_register;
Bit16u exp; /* 2 byte FP reg exponent */
- Bit16u aligment1, aligment2, aligment3;
+ Bit16u alignment1, alignment2, alignment3;
} GCC_ATTRIBUTE((aligned(16), packed));
#endif
Index: mmx.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/mmx.cc,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -d -r1.32 -r1.33
--- mmx.cc 12 Apr 2003 21:02:06 -0000 1.32
+++ mmx.cc 16 Apr 2003 18:38:51 -0000 1.33
@@ -103,12 +103,12 @@
exception(BX_UD_EXCEPTION, 0, 0);
/* check SW_Summary bit for a pending FPU exceptions */
- if(FPU_PARTIAL_STATUS & 0x0080)
+#define FPU_SW_SUMMARY 0x0080
+ if(FPU_PARTIAL_STATUS & FPU_SW_SUMMARY)
exception(BX_MF_EXCEPTION, 0, 0);
FPU_TWD = 0;
FPU_TOS = 0; /* reset FPU Top-Of-Stack */
-//FPU_PARTIAL_STATUS &= 0xc7ff;
}
#endif
Index: sse_move.cc
===================================================================
RCS file: /cvsroot/bochs/bochs/cpu/sse_move.cc,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -d -r1.18 -r1.19
--- sse_move.cc 12 Apr 2003 21:02:06 -0000 1.18
+++ sse_move.cc 16 Apr 2003 18:38:52 -0000 1.19
@@ -853,7 +853,6 @@
FPU_TWD = 0;
FPU_TOS = 0;
-//FPU_PARTIAL_STATUS &= 0xc7ff;
BX_WRITE_MMX_REG(i->rm(), mm);
#else
@@ -875,7 +874,6 @@
FPU_TWD = 0;
FPU_TOS = 0;
-//FPU_PARTIAL_STATUS &= 0xc7ff;
BX_WRITE_XMM_REG(i->rm(), op);
#else
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