Search Results for "formal verification"
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Showing 30 open source projects for "formal verification"
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SysAid is an ITSM, Service Desk and Help Desk software solution that integrates all of the essential IT tools into one product. Its rich set of features include a powerful Help Desk, IT Asset Management, and other easy-to-use tools for analyzing and optimizing IT performance.
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pydna
Clone with Python! Data structures for double stranded DNA
Clone with Python! Data structures for double stranded DNA & simulation of homologous recombination, Gibson assembly, cut & paste cloning. Planning genetic constructs with many parts and assembly steps, such as recombinant metabolic pathways, are often difficult to properly document as is evident from the poor state of documentation in the scientific literature. The pydna python package provide a human-readable formal description of cloning and genetic assembly strategies in Python which allow... -
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LazySets.jl
Scalable Symbolic-Numeric Set Computations
LazySets.jl is a Julia package for calculus with convex sets. The aim is to provide a scalable library for solving complex set-based problems, such as those encountered in differential inclusions or reachability analysis techniques in the domain of formal verification. Typically, one is confronted with a set-based recurrence with a given initial set and/or input sets, and for visualization purposes, the final result has to be obtained through an adequate projection onto low dimensions... -
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LiquidHaskell
Liquid Types For Haskell
This is the development site of the LiquidHaskell formal verification tool. If you're a LiquidHaskell user (or just curious), you probably want to go to the documentation website instead. LiquidHaskell (LH) refines Haskell's types with logical predicates that let you enforce important properties at compile time. LH warns you that head is not total as it is missing the case for [] and checks that it is total on NonEmpty lists. The input contract propagates to uses of head which are verified... -
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The ATS PL System
Unleashing the potentials of types and templates
The programming language ATS unifies implementation with formal specification by accommodating a programmer-centric approach to program verification: How do we know a program being implemented correctly? We ask the programmer to demonstrate it with a proof. -
CODESOFT is an enterprise-level RFID and barcode label design application offering unmatched flexibility, power, and support. Available in print-only, single-user, and network configurations, CODESOFT is designed to meet all of your barcode labeling needs. Whether your goal is streamlining label printing, printing labels using a form, connecting a scale to your label template, or integrating your business database with your label templates, CODESOFT provides a solution for your organization’s most advanced labeling needs. Connect to SQL or Oracle databases for business system integrations and greater efficiency. CODESOFT includes over 100 barcode symbologies including GS1, supports all common image formats, and enables rich text editing. Native printer drivers are included for over 4,000 thermal, thermal transfer, and inkjet label printers to ensure the best label printing quality.
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STPA Verifier is an Eclipse plug-in to verify the STPA safety requirements with model checker tools such as SPIN and NuSMV. The STPA-generated safety requirements are automatically transformed into formal specification in LTL (linear Temporal Logic). The STPA Verifier plug-in fetches all LTL formulae from XSTPA and allows user to load the verification model of system (Promela or SMV Model). Furthermore, STPA verifier provides a configuration view of each model checker (SPIN and NuSMV) to enable...
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G4LTL-ST
Generating PLC programs from formal specifications
G4LTL-ST is a standalone tool and a Java library for automatically generating industrial control software (supporting IEC-61131-3 Structure Text) from LTL or extended logic specifications. See Tutorial.txt inside the package for step-by-step instructions. For technical demails, see CAV'14 paper "G4LTL-ST: Automatic Generation of PLC Programs". The old version (G4LTL; under BSD license) is available under file\arxiv. -
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Cress Tool Suite
Cress is a comprehensive toolset for graphical service/workflow design
Cress (Communication Representation Employing Systematic Specification) allows graphical description of a wide variety of services such as in data communications/telecommunications, but Cress is not limited to this. The approach allows services to be described graphically as (work)flows of activities. Cress diagrams are automatically translated into formal languages for rigorous analysis and verification, and are also automatically translated into implementation languages for deployment... -
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UML-VT
A Formal Verification Environment for UML Activity Diagrams
UML-VT is an open source Eclipse plug-in that verifies UML activities against given requirements using well-know model checker tools such UPPAAL, SPIN, and NuSMV, and an experimental model checker PES. UML-VT is meant to support the integration of model checking into a MDD process. The integration aims to facilitate the use formal verification in the early phases of the development, and to create an easy to use interface regardless of the users knowledge of formal methods. Furthermore... -
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safecap
Safecap Platform for improving railway capacity via formal modelling
The overall aim of the SafeCap project is to develop modelling techniques and tools for improving railway capacity while ensuring that safety standards are maintained. Useful links: Project homepage: http://http://safecap.co.uk/ -
Track leads, jobs, and tasks from one easy to use software. You can access your information wherever you are, get everyone on the same page, and grow your business.
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Commercial-Business-Receipt
A commercial receipt is a basic foreign trade transaction document.
A commercial receipt is a basic legal or formal document that consists of information and data related to foreign trade transactions. The purpose and utilization of this document takes place once the companies and individual from various countries carry out trade of goods and services across the borders of their states. In business entities almost all types of activities and tasks are supported by documents and paper work. These documents are used for various purposes and are very useful... -
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Discrete Event Gnu Advanced Scheduling for plug-in replacement of pthread compatible applications. Generates deterministic execution runs suitable for discrete event simulations and formal verification.
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MiniTrix
The MiniMacs protocol implementation
The MiniMacs protocol is a Multi-party computation protocol for evaluating boolean circuits with constant overhead. This project provides an implementation of the on-line phase of that protocol with selected components development under formal verification. -
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AdvanceCyberPhysical
ADVANCE EU FP7: Modelling Cyber-Physical Systems
ADVANCE is an FP7 Information and Communication Technologies Project funded by the European Commission. The overall objective of ADVANCE is the development of a unified tool-based framework for automated formal verification and simulation-based validation of cyber-physical systems. -
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ADVISES (AutomateD VerIfication of wSn with Event calculuS) is a Java-based tool which has been designed and implemented to facilitate the application of two proposed verification techniques (static and dynamic verification of WSNs). The goal of the ADVISES tool is to automate the instrumentation of the scripts in event calculus formal language to obtain specification for any network.
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Syspect is a tool to specify a system using UML2 diagramms and translate them into a CSP-OZ-DC specification for formal verification.
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mdl is a system of formal mathematics, which is split into 2 levels: a high-level language for human-readable representation of math and low-level language for trustworthy verification. Currently, as low-level language mdl uses metamath system.
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Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.
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Java library for manipulating BDDs (Binary Decision Diagrams). Binary decision diagrams are widely used in model checking, formal verification, optimizing circuit diagrams, etc.
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The CoreASM project focuses on the design of a lean executable ASM (Abstract State Machines) language, in combination with a supporting tool environment for high-level design, experimental validation and formal verification of abstract system models.
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This project is a software and a framework implementing a formal specification generation approach. The tool supports the theory on formal modeling, automated composition and formal verification of system specifications.
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CheckFence is a SAT-based formal verification tool that analyzes C code implementing concurrent data types on multiprocessors (concurrent queues, sets etc.) with respect to a selected memory model.
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Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. NO tool is providing a global framework to develop algorithms. Silicis is a new formal framework for designing [verification] algorithms.
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This project proposes a tool for formal verification of web services composition based on Pi-calculus and the conversion between BPEL and pi-calculus. This tool integrates two kinds of formal verification techniques and can validate automatically.