Algorithmix

I have been trying to come up with a reliable test case for the first issue - but failed at even describing correctly what i should test and what the desired outcome would be Sorry to hear that it wasn't even understandable :) I can see why - especially because of (*). Since it sounds like you're still interested in understanding it, let me try to explain "Problem#1" again - and hopefully easier to follow this time, where i have a better understanding of it: (Remember: This one has already been solved,...

I have been trying to come up with a reliable test case for the first issue - but failed at even describing correctly what i should test and what the desired outcome would be Sorry to hear that it wasn't even understandable :) I can see why - especially because of (*). Since it sounds like you're still interested in understanding it, let me try to explain "Problem#1" again - and hopefully easier to follow this time, where i have a better understanding of it: (Remember: This one has already been solved,...

I have been trying to come up with a reliable test case for the first issue - but failed at even describing correctly what i should test and what the desired outcome would be Sorry to hear that it wasn't even understandable :) I can see why - especially because of (*). Since it sounds like you're still interested in understanding it, let me try to explain "Problem#1" again - and hopefully easier to follow this time, where i have a better understanding of it: (Remember: This one has already been solved,...

I have been trying to come up with a reliable test case for the first issue - but failed at even describing correctly what i should test and what the desired outcome would be Sorry to hear that it wasn't even understandable :) I can see why - especially because of (*). Since it sounds like you're still interested in understanding it, let me try to explain "Problem#1" again - and hopefully easier to follow this time, where i have a better understanding of it: (Remember: This one has already been solved,...

There should already be a reliable cycle-accurate test-case for problem#2 in this comment above: https://sourceforge.net/p/vice-emu/bugs/2024/?page=1#83c7 (Problem #1 should also be reproducible with the same code, by offsetting by 1 cycle) I wanted to write a better description, for the new issue, and perhaps make a test-case with an instruction longer than JMP. (Should be pretty easy, but don't have time right now)

Maybe "one of the coming days" was a bit optimistic - some weekend-work the last weeks and probably the next few ones too

Of course. I think there are only 2 things left: The monitor can't break between an instruction and the interrupt-BRK "pseudo-instruction". (If a RL-based breakpoint occurs during an instruction which is immediately followed by an interrupt, the breakpoint doesn't break until after the interrupt-BRK) Not an issue for "normal" breakpoints, only for breakpoints with a rasterline (RL) condition (and possibly other timing-related conditions). This might be working as intended, and not be a bug. If so,...

Hey, Olaf! Thank you for your reply. Some very awesome experiments and ideas you have written about! I'll try to give some input/opinions: CPU-history I completely 1000% agree with you that it would be extremely helpful to have the "interrupt-BRK" instructions in the CPU-history as well! That would be a very valuable debugging help! And it would also better show what the CPU have been executing. (Also, i'm glad i'm not the only one who have been surprised by this xD) Right now, in your prototype,...