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  • Posted a comment on discussion General Discussion on VeroRoute

    G'day Alex. Well I followed your instructions without any need for modification and with the result was able to follow the schematic to board process through by re-doing my simple totem circuit. (Attached) The VeroRoute circuit symbols are not nessesaraly the ones I would choose, so I will add to the library you have provided using the appropriate footprints in the preferred symbol copied into the VeroRoute tree. I have done my first practical VeroRoute layout for a small supercap to battery substitution...

  • Posted a comment on discussion General Discussion on VeroRoute

    Thank you Alex for such a comprehensive and quick reply. I downloaded and verified your schematic and generated net on my system, going through the same process from circuit to VeroRoute layout. It appears getting the netlist read to a valid format is easy compared to footprint and pinout accuracy. Taking your example with the two transistors I made a nonsense circuit to play around with fields in gEDA Schematic and where stuff ends up through the export process. http://www.gedasymbols.org/ has a...

  • Posted a comment on discussion General Discussion on VeroRoute

    Well done Alex. Your approach to the 1-off production of a working circuit with minimal mess and chemicals is refreshing. I am a Linux user and don't have a Windows OS other than a very old XP virtual so I won't be using TinyCAD. The Linux world has a range of shematic editors and I produce my schematics on gEDA. gEDA has a netlist generator called gnetlist that amongst others can export in the Protel II format. Notionally, if the component names can be made to line up, it might work. A quick test...

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geekas
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2018-03-21 22:14:58

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