Activity for Dietmar Warning
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Dietmar Warning committed [4cbadf] on ngspice-manuals
correct order description for sffm source
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diode: correct charge reporting for soft recovery option
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fix reverse recovery model for pch vdmos
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vdmos with soft recovery body diode
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You ask about mismatch simulation? It is more or less a question how the PDK lib is organized. E.g. IHP OpenPDK allows to set mm_ok=0 on instance level for switching off the gauss functions of the subckt model. Don't know how you can put this parameter into symbols properties fields.
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Exchange order of FC and FM parameter for SFFM source - bug #832
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add diode reverse recovery description
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Diode soft recovery model based on the idea of A. Buermen with iterated charge node for diffusion charge and model parameter Vp.
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reduce state vector and some cleanings
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correct authorship
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ngspice version? OS? Can you please post the 2 transistor netlist here in. For me it looks the message is from KiCAD and not from ngspice.
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OK - this is a more complicated case. It is not easy for us what is broken and what is correct. Would be easier to break down to a more simpler test case. Please provide this test case. If I make listing runnable of both circuit files I get only the difference shown in the picture. It looks crazy that this difference makes this large result difference. I see that the both result files are very different simulated in the IHP environment. Using the models from VA-Models the difference is smaller and...
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diode fix current reporting for soft recovery model
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You hijack existing thread for different questions - this is not allowed. And your question has nothing to do with ngspice executable, build and run behavior. How you organize your environment with PATH'es, virtual machines and environments , notebooks or whatever depends from you alone.
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Diode soft recovery model based on the idea of A. Buermen with iterated charge node for diffusion charge and model parameter Vp
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I see on other computer that my reset and push --force has not brought the result even it was shown as successful. May be we can change it by cherry pick from pre-master to master. Normally the contributors work with own branches and make merge request's. That would be more safe and comfortable.
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I see on other computer that my reset and push --force has not brought the result even it was shown as successful. May be we can change it by cherry pick from pre-master to master. Normally the contributors work with own branches and make PR. That would be more safe and comfortable.
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Please generate an new patch next time from pre-master-46. I just resetted.
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No, I tried git apply and git am but both failed for unknown reasons. Perhaps a crossing with my commits the patch was not synchronize. I will try to revert or editing the commit.
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make fft scaling independent from rounding behaviour for odd data
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correct Nyquist bin scaling for Green branch
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Merge branch 'pre-master-46' of ssh://git.code.sf.net/p/ngspice/ngspice into pre-master-46
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let nyquist bin not empty for odd vector
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Special Nyquist scaling only for even length
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revert commit 5e82b63
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Wow - tran 50ms statement now brings 20Hz frequency steps! Under this requirement we can go further - if you like. Can you please provide a diff to branch gf_fft_scale. I will play it in and make my checks.
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I just provided a fix into pre-master-46 for fft command and fft vector operation of real input data for ngspice fftw3 enabled. Attached are the results of my compare of certain test cases with Xyce. (.cir Xyce input .sp ngspice input in zipfile). One remark: To be fair - Xyce was used with their low standard FFT point number 1024. So the noise floor is much higher in few examples as ngspice. It is clear that these small pictures can't show the match of results, but anybody can make a side-by-side...
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correct fft scaling at Nyquist freq. in fft cmd and vector operation
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adapt FFT point number for real input vectors in fft cmd and vector operation wrt. bug #829
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SFFM parameter order not correct
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I hope you have a title line!
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Great theatre here! Maybe the attached files help us better to understand each other. It is a more practicable example with realistic devices where the design engineer took a simulation time w/o to much think about fft constraints. exam4.cir - Xyce input file exam4.sp - ngspice input file exam4_gf.dat - ngspice gf_fft_scale output file exam4_ngspice.dat - ngspice pre-master-46 output file exam4_xyce.fft0 - Xyce output file exam4.lis - comm. sim. output file FFT results are comparable at 1kHz and...
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But you see also over one week that the signal is not at correct frequency. We have 40kHz and you show it at 39.96kHz.
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I sent you a message. I have one ngspice.exe build from pre-release-46 and one builded from gf_fft_scale. I using for simulation compare same fft2.sp which I attached above. output pre-release-46: No. of Data Rows : 10005 FFT: Time span: 0.0001 s, input length: 1001 FFT: Frequency resolution: 10000 Hz, output length: 501 FFT: Time span: 0.0001 s, input length: 1001 FFT: Frequency resolution: 10000 Hz, output length: 501 e.g. 40kHz signal is exact on 40kHz output from gf_fft_scale: No. of Data Rows...
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No, no - one input file and two executables. Try it by your own. No fiddling around with tran statement. See the zoomed signal v(4) from intermod.sp. If you see circles - we can stop the discussion.
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The attached examples give correct frequency bins with the actual ngspice pre-master compared to commercial tool. But the modified branch gf_fft_scale shows not correct scaling. A tiny amplitude error exist perhaps by wrong dividing with point count.
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I tried the example above with the other simulator w/o additional 42 points * Compute FFT of two-frequency tone V1 out x DC 0 SIN(0 1 1000 0 0 90) V2 x 0 DC 0 SIN(0 1 2048 0 0 90) R1 out 0 1.0 .tran 0.000244140625 1.0 start=0m .option delmax=10u .fft v(out) np=4096 .END The listing is attached, magnitudes are the half only. Will try to understand by reading the manual. With the modified ngspice I get same results as you. EDIT: Setting a format option for fft to unnormalized then I got 1V and 2V ...
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I tried the example above with the other simulator w/o additional 42 points * Compute FFT of two-frequency tone V1 out x DC 0 SIN(0 1 1000 0 0 90) V2 x 0 DC 0 SIN(0 1 2048 0 0 90) R1 out 0 1.0 .tran 0.000244140625 1.0 start=0m .option delmax=10u .fft v(out) np=4096 .END The listing is attached, magnitudes are the half only. Will try to understand by reading the manual. With the modified ngspice I get same results as you.
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After removing the 1.5 term (is since start of ngspice in linear.c) I got following: with nyquist_test: FFT: Time span: 0.016 s, input length: 800 FFT: Frequency resolution: 62.5 Hz, output length: 401 frequency[length(frequency)-1] = 2.500000e+04 frequency[400] = 2.500000e+04 mag(signal)[400] = 2.000000e+00 With fft2 updated and tend=1 No. of Data Rows : 4104 FFT: Time span: 1 s, input length: 4096 FFT: Frequency resolution: 1 Hz, output length: 2049 frequency[length(frequency)-1] = 2.048000e+03...
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I created a new branch "gf_fft_scale" with the applied patches. First tests are done. BTW - our linearize cmd has a problem on both ends as to see in the modified test file.
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Fix nyquist bin normalization
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Fix FFT normalization
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Fix freq bins in fft
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Sorry - I have not the time at the moment to dig deeper into this issue. My proposal: Open an development branch and implement the correct algorithm for fft/linearize. But be aware fft is used on different places, as fft / psd cmd and for vector operation. And in the end restore operation with ifft should give the original signal back. I would not say reference simulator but LTSPICE is a good choice for comparing.
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Listing files attachment.
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I am afraid that I can't help here. You may right, but from users perspective he want see a spectrum at 1kHz if the signal is 1kHz w/o any tran parameter acrobatic. I made a check with a very popular non-opensource simulator with this netlist: FFT test V1 out 0 DC 0 SIN(0 1 1000 0 0 90) R1 out 0 1.0 .tran 0.000244140625 0.124755859375 0m 0.000244140625 .END and got the attached rms signal. Then I made an test with a roughly 70k$/y simulator with following netlist: FFT test V1 out 0 DC 0 SIN(0 1 1000...
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I am afraid that I can't help here. You may right, but from users perspective he want see a spectrum at 1kHz if the signal is 1kHz w/o any tran parameter acrobatic. I made a check with a very popular non-opensource simulator with this netlist: FFT test V1 out 0 DC 0 SIN(0 1 1000 0 0 90) R1 out 0 1.0 .tran 0.000244140625 0.124755859375 0m 0.000244140625 .END and got the attached rms signal.
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I think the problem is more complex to solve it with the proposed fix. I used fftw3 enabled. The first picture show the plot with actual git code and the provided test case (4ms). The second is the modified code in com_fft. The signal landed in wrong bin. Both results show an amplitude error because dividing by wrong sample count.
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Obviously the fft scale is buggy. We have to check this in different functions, not only in com_fft. BTW - one question to your proposal: span = time[length-1] - time[0]; if (length > 1) { span += time[1] - time[0]; } Why add the first interval instead using the last? span = time[length] - time[0];
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Thanks for testing this problem. But your proposal gives for the pathological case length=1 still a span of 0.
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Can't see the pictures. Former post was OK.
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I think it has to be checked with gcc and msc++ too. And may be the originator of this library https://tesch1.gitlab.io/cppduals is a better address.
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Can you please provide an exported netlist from xschem. It would make the life easier.
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The structure of your testbench is unusual and wrong: control section and swept voltage source inside subckt. Please break down your testcase to a much simpler spice netlist to demonstrate your problem. Schematics and PDF doc's will not help. Attached is a similar script for gm-Id plot. Perhaps it helps.
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Correct vgs assignment - bug found by K. OHara
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You meant vdmosconf.c. l.85 and this is done last year with commit 8c3d4d79. I will look regarding the bug in vgs equation. Thank you.
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In which line is the missing VDMOStype in vdmosload.c?
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remove redundant definition and unused variable
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Arpad, it is done as mentioned. Thanks
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Minor change that helps VADistiller
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Minor change that helps VADistiller.
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convert to lower case for spice2 input and remove few warnings
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rm ngnutmeg from build list of old apps
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Hi Arpad, is it the only place to require new local variable? Or do we have this problem in other models too? I would prefer to rename cdeq to cdeqsw as local in this diode case.
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OK - is a bit fuzzy, but it works. In the book (not in the paper) is a prefactor alfa before lteratio (ltetrtol) less one and time point spacing and integration method dependent. In the table on p. 188 stands lteratio between 3.5 (default) and 10 (conservative).
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I made few trials under win11/VS22, but not any of this circuits works: examples\klu\Circuits\85\c7552\c7552.net examples/soi/ring51_40.sp example/vdmos/100W.sp examples/vbic/DFF_Y_ECL.sp Made few attempts with ltetrtol=default and 10. The simulation stops immediately with different errors. BTW: I have not the book available but in a public paper (attached) from Ken Kundert he said that the TRTOL from voltage based LTE formulae is equivalent to lteratio from spectre. And in there manual I see values...
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Regarding my post and the mentioned bug: Even the published curves Ids=f(Vgs,Vds=50V) are measured with pulsed equipment and so w/o selfheating it is possible to make temperature sweeps also with thermal switched ON models. VDMOS temperature test M1 D G 0 tj tc IRFP240 thermal VG G 0 4V VD D 0 50V .model IRFP240 VDMOS nchan + Vto=4 Kp=5.9 Lambda=.001 Theta=0.015 ksubthres=.27 + Rd=61m Rs=18m Rg=3 Rds=1e7 + Cgdmax=2.45n Cgdmin=10p a=0.3 Cgs=1.2n + Is=60p N=1.1 Rb=14m XTI=3 + Cjo=1.5n Vj=0.8 m=0.5...
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more realistic default values for case to ambient thermal resistance and device transconductances
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Adapt VDMOS Vth temperature coefficient to usual notation with - for nch and + for pch.
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Actual pre-master-46 show correct temperature dependency - see attachments. But it is not in line with my notation in my post before. |Vth| and gain goes down with rising temperature for both channel types. Because this seems a typical temperature dependency I would prefer to change this in next release. BTW - there is another bug in the model: switching on thermal model removes temperature dependency for temp sweep. Thought that I repaired this already.
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If I remember right I followed at most the discussion DiY forum VDMOS. I think the work from Ian Hegglun is the best for VDMOS modelling and parametrization I know. So I used his library (ltspice focussed) for most test cases. In his library for devices of different manufacturers I see this rules: nch VtoTC negativ pch VtoTC positiv resistor coefficients positive Exponent for mobility (gain) of both types: negative means decreasing current wit increasing temperature In my experience the temperature...
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Can confirm: The segfault is a subsequent fault in fft because tran is not successful. Tried to decrease the thermal resistances but no luck.
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Only an idea: You have v(fosc) in your write command and I assume it is a vector over the entire time duration. Try to separate these from your scalar results.
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Diode sensitivity analysis: Exclude few parameters and add level 3 geometry parameter.
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Fix the overlap in state vector for sensitivity states of diode and bjt model.
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KLU bindings for separate sw diode only if sw resistor is given
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Diode model level=2 (Fowler-Nordheim) is not supported.
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diode discontinuity
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Problem fixed by commit c1acc44 in pre-master-46.
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This fixed #822 diode discontinuity problem
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diode discontinuity
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Add optional switch for separate bottom and sidewall diode model - configuration is dependent from model parameter RSW
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add new separate diode model option
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reorder calculation sequence
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Merge request is applied into pre-master-46
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Fixed double temperature scaling.
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Merge request is applied into pre-master-46
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More VDMOS fixes
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Inconsistent behavior in VDMOS thermal model
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Latest vdmos commit fixed the problem.
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general vdmos update
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more reasonable branch name
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respect device temperature alternative to ckt temperature
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Apply A. Buermen's fix for correct thermal capacitance Cthj store in state vector
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This is already done in branch dw_vdmos and will be supplied in one commit to pre-master-46.
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apply A. Buermen's patch for correct m scaling
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VDMOS: apply m scaling fix for acld as well
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Thanks Arpad for the corrections of vdmos m scaling. Seems I missing the mentioned email. Please be aware my branch dw_vdmos with few corrections in the thermal model like threshold voltage and source resistance temp feedback.
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VDMOS scaling fixed
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Fallback to optran not needed and
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