User Activity

  • Posted a comment on discussion General Discussion on VeroRoute

    Sorry but I cant see how to do that. Netlists mentioned in the file get dynamically mapped to unique numbers in veroroute during import.

  • Modified a comment on discussion General Discussion on VeroRoute

    The "View" menu item has an option under it where you can switch between Normal Mono Mode and Inverse Mono Mode. Cany

  • Modified a comment on discussion General Discussion on VeroRoute

    The "View" menu item has an option under it where you can switch between Normal Mono Mode and Inverse Mono Mode. Cany

  • Posted a comment on discussion General Discussion on VeroRoute

    No way to make circular capacitors dynamically sized. You would need to use component editor to make a capacitor of required size. You can take an existing capacitor, open it in component editor, edit to change the pin locations and size of circles, then save it as new capacitor type in parts library.

  • Posted a comment on discussion General Discussion on VeroRoute

    The "View" menu item has an ootion under it where you can switch between Normal Mono Mode and Inverse Mono Mode. Cany

  • Posted a comment on discussion General Discussion on VeroRoute

    I downloaded a newer Android SDK for Qt and did a VeroRoute build with it. I can get it to run on my Kindle Fire tablet but it wont install on my phone (which has a a newer Android version than my Kindle). I have uploaded a test apk that you can try out (veroroute-2.40-test.apk). I would be interested to know if it works on any other Android devices than my Kindle.

  • Modified a comment on discussion General Discussion on VeroRoute

    The netlist doesnt contain part footprints so wont help with optimising a layout. There are probably some more modern netlist formats that contain additional information on part sizes and design limits for PCB layout and testing. You would be best off using an EDA program that starts with circuit schematic and all the part info.

  • Posted a comment on discussion General Discussion on VeroRoute

    The netlist doesnt contain part footprints so wont help with optimising a layout. There are probably some more modern netlist formats that contain additional information on part sizes and design limits for PCB layout and testing. You would be best off using an EDA program that starts with circuit schematic and all the part info. VeroRoute is

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Personal Data

Username:
dralx
Joined:
2017-06-12 15:26:12
Location:
Britain (UK) / BST
Gender:
Male

Projects

This is a list of open source software projects that Alex Lawrow is associated with:

  • Project Logo VeroRoute Qt based Veroboard, Perfboard, and PCB layout and routing application Last Updated:

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