disha

Why does the adc_bridge not work when we have an input dc value? The plot for v(1) appears but v(cmp) is blank. .model adc_buff adc_bridge(in_low=0.5 in_high=0.5) v7 1 0 5 Aad1 [1][cmp] adc_buff .control tran 0.02u 7u plot v(1) plot v(cmp) .endc .end

Is this netlist correct for a sample and hold application? S/H .include UA741.MOD .model P1 PMOS .model N1 NMOS .model adc_buff adc_bridge(in_low = 0.8 in_high=2) .model dac_buff dac_bridge(out_high = 5) x1 5 out 2 3 out UA741 x2 out1 out2 2 3 out2 UA741 x3 out2 output 2 3 cmp1 UA741 vcc 2 0 dc 15v vee 3 0 dc -15v vin 5 0 sin (0 5v 1k 0 0) Vclk1 13 0 PULSE(1 -1 1PS 1PS 1PS 0.25us 0.5us) Vclk 14 0 PULSE(-1 1 1PS 1PS 1PS 0.25us 0.5us) M1 out1 14 out out P1 M2 out1 13 out out N1 c1 out1 0 1n .control...

Thank you so much fo your help!!!

I'm using ngspice-27 on ubuntu OS.

Comparator Including the predefined op-amp subcircuit file .include UA741.MOD Connections as mentioned in subcircuit file x1 5 1 2 3 4 UA741 vcc 2 0 dc 15v vee 3 0 dc -15v v1 1 0 dc 7v v5 5 0 dc 5v .control run tran 0.02ms 6ms plot v(4) .endc .end That fixed the error. However, when I change v1 to 7v the same error persists.

I'm trying to simulate a comparator on ngspice. It's giving me a strange error. Comparator *Including the predefined op-amp subcircuit file .include UA741.MOD x1 5 1 2 3 4 UA741 vcc 2 0 dc 15v vee 3 0 dc -15v v1 1 0 dc 5v v5 5 0 dc 1v .tran 0.02ms 6ms .control run plot v(4) .endc .end Error: buffer overflow detected : ngspice terminated Aborted (core dumped) Opamp Model: (REV N/A) SUPPLY VOLTAGE: +/-15V CONNECTIONS: NON-INVERTING INPUT | INVERTING INPUT | | POSITIVE POWER SUPPLY | | | NEGATIVE POWER...

Thank you!

Thanks for the help!