Ansys PathFinderAnsys
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ChipMantraBSC Global
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About
Ansys PathFinder-SC is a high-capacity solution to help you plan, verify and sign-off IP and full-chip SoC designs for integrity and robustness against electrostatic discharge (ESD). Ansys PathFinder-SC identifies and isolates the root causes of design issues that can cause chip failure from charged-device model (CDM), human body model (HBM), or other ESD events. It’s high-capacity, cloud-native architecture can enlist thousands of compute cores for fast full-chip turnaround. PathFinder-SC is certified by major foundries for current density checks and ESD sign-off. PathFinder-SC’s integrated data modeling, extraction and transient simulation engine is an end-to end solution for ESD verification. The single-pass use model reads industry-standard design formats, sets up ESD rules, extracts the RCs for the power network, and performs ESD simulations to analyze root causes and provide fix and optimization feedback, all within a single tool.
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About
ChipMantra is a cloud-based AI-assisted semiconductor verification platform for teams using Universal Verification Methodology (UVM). It accepts RTL designs or existing UVM verification environments for analysis and supports workflows for generating reusable UVM components such as drivers, monitors, sequencers, agents and scoreboards. Its analysis features are presented as reviewing verification architecture and testbench health, highlighting potential coverage gaps, missing scenarios, assertion issues and risks, and producing verification reports. The platform is intended for verification engineers, hardware designers and semiconductor teams working on ASIC and system-on-chip development. ChipMantra combines UVM environment generation with verification analysis so teams can use AI-assisted tools alongside their existing design and verification workflows.
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Platforms Supported
Windows
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Mac
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Linux
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Cloud
Supported
On-Premises
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iPhone
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iPad
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Android
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Chromebook
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Platforms Supported
Windows
Not Supported
Mac
Not Supported
Linux
Not Supported
Cloud
Supported
On-Premises
Not Supported
iPhone
Not Supported
iPad
Not Supported
Android
Not Supported
Chromebook
Not Supported
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Audience
Enterprises interested in an electrostatic discharge simulation software to plan, verify and sign-off IP and full-chip SoC designs
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Audience
Semiconductor design and verification teams, hardware engineers, verification engineers, ASIC and SoC development teams, EDA professionals, and organizations using UVM-based verification workflows.
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Support
Phone Support
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24/7 Live Support
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Online
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Support
Phone Support
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24/7 Live Support
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Online
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API
Offers API
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API
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Pricing
No information available.
Free Version
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Free Trial
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Pricing
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Free Version
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Free Trial
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Reviews/
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Training
Documentation
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Webinars
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Live Online
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In Person
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Training
Documentation
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Webinars
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Live Online
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In Person
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Company InformationAnsys
Founded: 1970
United States
www.ansys.com/products/semiconductors/ansys-pathfinder-sc
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Company InformationBSC Global
Founded: 2007
Australia
chipmantra.com
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Integrations
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