SYSU-OpenEdgeAI

SYSU-OpenEdgeAI Club is a community of geeks who have innovative ideas as well as a great passion for Edge AI technologies. All of our works are open source, and we sincerely welcome all the Edge AI lovers to join us to solve problems and learn!

Until 2020-12-27, we have already upload three projects:
1. ov_carplate.zip is a car plate recognition project based on Zedboard Zynq-7000.

2. mnist_hls.zip is a realization of Lenet for MNIST handwritten digit recognition using Vivado hls tool.

3. rapidlayout.zip is an end-to-end hard block placement and routing flow for systolic accelerators on FPGA, RapidLayout. It is the sourcecode of our paper:https://ieeexplore.ieee.org/document/9221566 .

If you have any question about our projects, please leave reviews and contact us!

Features

Artificial Intelligence
Edge AI
FPGA
Systolic Array
Evolutionary Algorithm
FPGA Placement
MNIST_HLS
vivado
vivado-hls
fpga accelerator
zedboard
Zynq-7000

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