SVUnit

Features

• Generate all 3 layers of the SVUnit framework
• Supports unit test templates for systemverilog modules, interfaces and classes
• Supports unit testing of UVM components
• Processes sub-directories recursively to aggregate unit tests into multiple testsuites
• Compiles one or more testsuites into a single simulation executable
• Supports Synopsys VCS, Mentor Questa and Cadence Incisive simulators
• Reports PASS/FAIL result for each unit test, testsuite and aggregated test run
• Supports unit testing of design, reference model and testbench code
• Functioning examples of SVUnit applied to UVM components

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SVUnit Web Site