Scicos-HDL is a tool to design digital circuit system; it integrates the hardware circuit, algorithm and Scilab/Scicos environment as a plat for digital circuit design, simulation and Hardware Description Language generation. ZhangDong & KangCai

Project Samples

circuit diagram D trigget synthesizedby by Synplify Peripheral circuit of single chip synthesize by Synplify 4-bit-couter simulation synthesized 74138' HDL generated by Scicos HDL by Synplify

Project Activity

See All Activity >

Categories

Chat, Email, Window Managers

License

GNU Library or Lesser General Public License version 2.0 (LGPLv2)

Follow scicosHDL

scicosHDL Web Site

Other Useful Business Software
Enterprise-grade ITSM, for every business Icon
Enterprise-grade ITSM, for every business

Give your IT, operations, and business teams the ability to deliver exceptional services—without the complexity.

Freshservice is an intuitive, AI-powered platform that helps IT, operations, and business teams deliver exceptional service without the usual complexity. Automate repetitive tasks, resolve issues faster, and provide seamless support across the organization. From managing incidents and assets to driving smarter decisions, Freshservice makes it easy to stay efficient and scale with confidence.
Try it Free
Rate This Project
Login To Rate This Project

User Reviews

Be the first to post a review of scicosHDL!

Additional Project Details

Operating Systems

Linux, FreeBSD, Windows

Languages

English, Chinese (Simplified)

Intended Audience

Healthcare Industry, Science/Research, Education, Telecommunications Industry, Developers

User Interface

Tk

Programming Language

C, Tcl, VHDL/Verilog, IDL

Related Categories

C Chat Software, C Email Software, C Window Managers, Tcl Chat Software, Tcl Email Software, Tcl Window Managers, VHDL/Verilog Chat Software, VHDL/Verilog Email Software, VHDL/Verilog Window Managers, IDL Chat Software, IDL Email Software, IDL Window Managers

Registered

2006-07-25
Report inappropriate content