An experimental ISS for freescale's e500v2 core. It is meant to simulate only cpu and memory subsystem and is purely intended for academic/learning purposes only.

Features

  • full support of booke mmu emulation ( l2 tlbs only ).
  • support for a target based memory model ( targetting DDR, CCSR and IFC for time being )
  • support for a well tested logging framework.
  • support for an interactive python shell to control the simulation environment.
  • support for an elf loader to directly load elf binaries in memory.
  • support for powerpc exception mechanism.
  • all core instructions except SPE are implemented.
  • support for instruction tracing and coverage logging.

Project Samples

Project Activity

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Categories

Simulation

License

GNU General Public License version 2.0 (GPLv2)

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Additional Project Details

Operating Systems

BSD, Linux

Intended Audience

Developers, Engineering, Science/Research

User Interface

Console/Terminal

Programming Language

Assembly, C++, Python

Related Categories

Python Simulation Software, C++ Simulation Software, Assembly Simulation Software

Registered

2012-05-14