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Descrições de circuitos em VHDL e verilog

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Name	Modified	Size
MEMORIA_ROM.vhd	2012-11-22	1.3 kB
ULA.vhd	2012-11-22	2.7 kB
unidadeAritmetica.vhd	2012-11-22	5.0 kB
four_state_moore_state_machine(sem_alteracao).VHD	2012-11-22	1.6 kB
latch_D.VHD	2012-11-22	670 Bytes
MEMORIA_RAM.VHD	2012-11-22	2.1 kB
Decodificador.VHD	2012-11-22	939 Bytes
FlipFlop_JK.VHD	2012-11-22	1.5 kB
Comparador.VHD	2012-11-22	1.1 kB
Totals: 9 Items		16.8 kB

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